Run 11 (Update: 5 April 2011)

• G101 delivered, unpacked and installed in K100 fridge.
  • Journey across the country doesn't seem to have been too traumatic.
  • Slight issue with Schuba extender plugs solved by shaving off 0.200” of copper.
• Low frequency noise witnessed on all channels.
  • Significantly more on the 3 outermost electrodes Q2-4
  • The noise only showed up when the two boards were both connected to the ebox, even if only one was powered up.
  • Not sure if this had to do with the scratch across Q2-4.
• The true bias voltage differs from that applied to the boards in the vi. Calibration of the bias voltages has been performed.
• The 60 keV peak is visible on Q1, Q2 & Q4.
• Q2 showed a drastic neutralization loss after ~15min of bias. Neutralization change in Q1 was less drastic but still visible.
• Took a number of data sets at -1V, -2V, -4V, -6V and -8V. These voltages were nominal values. (Not calibrated.) Will take more data with calibrated biases.

Further photographs and details on unpacking the 100 mm crystal, and plots from the shock sensor, are shown in the following run diary page for run 11: 2011/02/24-26. A photograph of the detector vessel upon opening the box is shown in Figure 1, and the G-force sustained by the detector vessel (puck), as measured by the shock sensor, during its journey from SLAC to UMN is shown in Figure 2. It is unlikely that the vessel was subjected to an acceleration of 15 g in the x-direction during its transit, and Gary believes these high values in the x-direction are likely to be a result of some glitch.

Figure 1: Puck holding detector, suspended with rubber bands.

Figure 2: G-force sustained by puck during its journey across the country. Vertical red lines represent handling by FedEx. Further details are given here (run 11 diary: 2011/02/24-26).

Asembly of the tower and source holder (Figure 3(a)) are shown here (run 11 diary: 2011/03/07). In addition to the large scratch across the outer three electrodes (Figure 3(b)), a smaller scratch was witnessed on Q4, the outermost electrode.

Figure 3(a): Thermometer and fully assembled source holder.	Figure 3(b): Large scratch across Q2, Q3 & Q4.

Care was taken to avoid placing a source directly above one of these scratches, as shown in Figure 4(a). There was a slight issue with the Schuba extender plugs, as it was initially not possible to insert the side coax pins into their respective sockets. This was solved by milling the copper piece down by 0.200”. For future reference, a more accurate figure of 0.162” was calculated by Gary. These details, and photographs of the tower assembly procedure are given in the following run diary pages: 2011/03/07; 2011/03/08; and 2011/03/11. A photograph of the assembled tower is shown in Figure 4(b).

Figure 4(a): Orientation of sources and source holder above tower.	Figure 4(b): Assembled tower.

LED2 on DIB1 stopped working at some point between unpacking and assembly. Photographs of the wire bonds shown here (run 11 diary: 2011/03/09) show no sign of breakage. The cause of this remains a mystery.

The noise PSDs taken with cdmsbats (see run 11 diary page: 2011/03/17) were a little suspicious. No matter how strict a cut was placed on the algorithm that selects noise traces, pulses seemed to have contaminated the PSDs. Manually selecting the pulses yielded better results, as shown in Figure 5 (see run 11 diary page: 2011/03/22 for more details).

Figure 5: Charge Noise PSDs. Each curve is an average of ten 1.6384 ms long traces. All traces were manually selected to ensure there was no contamination from pulses.

Low frequency noise is present on signals from all electrodes. The noise at low frequency is more prevalent on the outer three electrodes Q2-4, which is thought to be a result of the large scratch across these electrodes. Some typical charge pulses are shown here (run 11 diary: 2011/03/16).

In an effort to investigate the source of the large noise in the charge channels, several DCRC configurations were tested. This involved assessing the baseline noise in the time domain when: only one board was plugged in; both boards were plugged in but only one was powered; and both boards were powered and plugged in. Some screenshots of typical traces in these configurations are shown here. The following conclusions were reached:

• Noise spectra look good when only one DCRCv3 board is plugged in.
• When a second board is plugged in, the baselines for Q2, Q3 & Q4 become erratic, even when this second board is unpowered.
• This is thought to be due to the scratch across these electrodes that allows for “hopping” between them.

Initially DCRC30 was attached to DIB1, as we attempted to reduce the noise and lower the trigger threshold, we swapped the two boards, and attached DCRC30 to DIB2, as this board exhibited the least noise and Q1 (the innermost electrode) was wired to DIB2. Charge signal spectra in this configuration (DCRC30 on DIB2, DCRC33 on DIB1) are shown in Figure 6(a).

Although the 60 keV peaks are visible in the spectra from Q2 & Q4 (the channels connected to DIB1, which is read out with DCRC33), surprisingly there are no peaks in Q1 or Q3. The fact that there is no 60 keV peak in the former channel is perhaps a little more alarming, as this electrode should exhibit the best response as it does not feature any defects and occupies the centre of the crystal.

Figure 6(a): DCRC30 on DIB2 (Q1 & Q3), DCRC33 on DIB1 (Q2 & Q4), -4 V bias on all electrodes	Figure 6(b): DCRC30 on DIB1 (Q2 & Q4), DCRC33 on DIB2 (Q1 & Q3), -4 V bias on all electrodes

Swapping the boards around further compounds matters, as Q1 kicks into life as shown in Figure 6(b).

To get a handle on the amount of time data could be taken before the detector required flashing, hour-long runs were conducted followed by 20 minutes of flashing. The detector was then left to cool down for 40 minutes prior to the start of another run (see run 11 diary: 20110325 for further details). Charge signals as a function of time are shown in Figures 7(a) and 7(b) for the initial (DCRC30 on DIB2, DCRC33 on DIB1) and final (DCRC30 on DIB1, DCRC33 on DIB2) configurations respectively.

Figure 7(a): DCRC30 on DIB2 (Q1 & Q3), DCRC33 on DIB1 (Q2 & Q4), -4 V bias on all electrodes	Figure 7(b): DCRC30 on DIB1 (Q2 & Q4), DCRC33 on DIB2 (Q1 & Q3), -4 V bias on all electrodes

It is apparent that signal quality degrades after around 15 minutes of operation at -4 V bias.

With DCRC30 attached to DIB1 (Q2 & Q4) and DCRC33 reading out DIB2 (Q1 & Q3), charge signal spectra at various bias voltages were taken as shown in Figure 8. The energy scale is not calibrated and the cuts are not carefully tuned. These data were taken with the nominal biases.

Figure 8(a): Charge Signal Spectra at -1 V bias on all electrodes	Figure 8(b): Charge Signal Spectra at -2 V bias on all electrodes

Figure 8( c): Charge Signal Spectra at -6 V bias on all electrodes	Figure 8(d): Charge Signal Spectra at -8 V bias on all electrodes

Therefore it would be wise to consider the possibility that the DCRC boards are the cause of this non-uniform field. Various bias voltages were applied to all the electrodes through the vi, and the true voltage was measured directly from the board. The results are given in Table 2.

There appears to be some discrepancy between the applied and true bias voltages. There is a larger discrepancy of 0.2-0.4 V between channels on different boards. A charge lookup table has been created from this data, and is available on the DCRCv3 page.