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2011/03/17

0947 Stopped flashing the detector. DCRC30 didn't respond when I connected detector control vi to it. Presumably the flashing worked last night telling from the temperature change. But I'm not sure. Cycle the power of DCRC30. DCRC33 worked fine.
1003 Fill N2 cold trap full
1126 Started taking data 07110317_1126_F0001. Bias -3V on Q1-4. Trigger: Q1 OR Q2 OR Q3 OR Q4. Threshold: 40 ADC bins. DIB2→Detector 1, DIB1→Detector 2.
1600 Stop run. Start flashing detector while processing data; same settings as yesterday: DIB1 LED1, 0.6 mA, flash ON time 100 μs, flash OFF time 2500 μs; DIB2 LED1&2, 0.6 mA, flash ON time 100 μs, flash OFF time 2500 μs.
1800 Fill N2 cold trap full.
Realise charge biases were not set to 0 V before flashing. Interrupt flashing, set biases on all charge channels to 0 V, and start flashing again.
1910 Stop flashing detector. Wait for detector to cool down.
1925 Take random noise traces at varying bias voltages:
Data File Bias on all Channels [V] No. of Random Triggers DCRC Configuration File
07110317_2004_F0001 0.0 2000 DCRC_00Vbias.xml
07110317_2012_F0001 -0.5 2000 DCRC_05Vbias.xml
07110317_2017_F0001 -1.0 2000 DCRC_10Vbias.xml
07110317_2022_F0001 -1.5 2000 DCRC_15Vbias.xml
07110317_2030_F0001 -2.0 2000 DCRC_20Vbias.xml
07110317_2035_F0001 -2.5 2000 DCRC_25Vbias.xml
07110317_2045_F0001 -3.0 2000 DCRC_30Vbias.xml
07110317_2053_F0001 -3.5 2000 DCRC_35Vbias.xml
07110317_2059_F0001 -4.0 2000 DCRC_40Vbias.xml
07110317_2105_F0001 -5.0 2000 DCRC_50Vbias.xml
07110317_2110_F0001 -6.0 2000 DCRC_60Vbias.xml
07110317_2116_F0001 -7.0 2000 DCRC_70Vbias.xml
07110317_2122_F0001 -8.0 2000 DCRC_80Vbias.xml
07110317_2143_F0001 -9.0 2000 DCRC_90Vbias.xml
07110317_2153_F0001 -10.0 2000 DCRC_100Vbias.xml

Charge Noise PSDs

There appears to be no correlation between bias voltage and low frequency noise. Just under 25% of events remain after cut on random triggers. At first glance, it looks as though pulses do sneak in, but using a stricter cut yields no difference.

Note different y-axis scale in Figure 1.

Figure 1: Charge Noise PSDs for Q1 at varying bias voltages
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Figure 2: Charge Noise PSDs for Q2 at varying bias voltages
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Figure 3: Charge Noise PSDs for Q3 at varying bias voltages
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Figure 4: Charge Noise PSDs for Q4 at varying bias voltages
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