2015/08/25 (Tuesday)

previous day

0950	Filled LN2 cold trap full. LHe 72.7%, G1/G2 = 155/143 mbar, 1K pot = 1.743K, Tower = 31mK.
1134	Trying 3 DIB iZip mode with 3.2MHz filters on all DIBs.

ebox→cables→gender changer → 3.2MHz Pi filter → DCRC

DIB1/2/3 = DCRC 55/33/50

DCRCs are resting side by side, horizontally atop breakout box.

1200	Having some trouble with DCRC 33 charge channels. Use DIB1/2 = DCRC 55/50 to check that coupling capacitors were not damaged during HV testing. Charge pulses on both sides look good!
1357	Switch back to DIB1/2/3 = DCRC 55/33/50. Tower temp = 31.8mK. Zap all squids.
1457	Try to apply squid settings. Based on last good settings from previous run 2015/06/08 for DIB2/3 and 2015/07/10 for DCRC55. Set QET bias by eye.

DIB1, DCRC 55
	Bias (uA)	Lockpoint (mV)	QET Bias (uA)
pA	-76	-2.04	100
pB	-68	-1.46	105
pC	-80	-3.21	115
pD	-76	-2.14	110

DIB2, DCRC 33
	Bias (uA)	Lockpoint (mV)	QET Bias (uA)
pA	78	5.25	90*
pB	66	3.02	90*
pC	84	3.50	110*
pD	84	3.02	100*

*Initially couldn't see pulses for QET biases up to 160uA. DIB2 phonons seem unresponsive to squid setting changes until gains were played with. See note at 1552.

DIB3, DCRC 50
	Bias (uA)	Lockpoint (mV)	QET Bias (uA)
pA	-84	-4.67	100
pB	-86	-2.82	100
pC	-72	-1.95	80
pD	-88	-2.53	100

1549	Power cycle ~~DCRC33 (DIB2)~~ oops, actually DCRC 55 (DIB3)
1552	Up to now, all FE Gain/Output Gain/Driver Offsets = 1/0/0 Changing DCRC33 output gains to 1 gets nice-looking, but inverted, phonon pulses.
1603	Had accidentally power-cycled DCRC 55, zap its squids and re-apply settings.
1620	Good pulses on all 3 DIBS in charge and phonons except DIB2,DCRC84(revC) which has inverted phonons. Otherwise, no problems encountered. Tower temp has remained stable at 31.8mK. Is this working now because of long cables, filters, DCRC relative orientation, or witchcraft?
1641	Filled LN2 dewar full.

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