2021/02/28 (Sunday)
- Lab in-person: Ruiren
- Virtual partner: Matt
| Status | Run 74 in progress. |
|---|---|
| Setup: DIB1/2+acc → SL 41/43 → 3.2 MHz filters → cables 2/3 → nothing/motor_board+HV_board → DCRC50(3)/55(1). No lead/poly shield. | |
| 0830 | MB = 70.7 % |
| 0850 | Tower = 94.1 mK |
| 0850 | Start 31min series of 3V data (bias applied after 1 min), with 1000 beginning randoms, trigger threshold 50/50/50/50 on DCRC3qI/qO/DCRC1qI/qO, 5 Hz in-run randoms, with 1.6384 ms pulses (8192 length) and 400 us prepulse (500 length). Use sequence r74_takeandflash_dcrcbias.msl |
| Looks like it may have been triggering constantly. Annoying. | |
| 1125 | Tower = 94.9 mK |
| 1125 | Start 31min series of 1V data (bias applied after 1 min), with 1000 beginning randoms, trigger threshold 50/50/50/50 on DCRC3qI/qO/DCRC1qI/qO, 5 Hz in-run randoms, with 1.6384 ms pulses (8192 length) and 400 us prepulse (500 length). Use sequence r74_takeandflash_dcrcbias.msl |
| Triggering looks OK. | |
| 1320 | Tower = 96.4 mK |
| We'll try 3V again, maybe this time it won't overtrigger. | |
| 1319 | Start 31min series of 3V data (bias applied after 1 min), with 1000 beginning randoms, trigger threshold 50/50/50/50 on DCRC3qI/qO/DCRC1qI/qO, 5 Hz in-run randoms, with 1.6384 ms pulses (8192 length) and 400 us prepulse (500 length). Use sequence r74_takeandflash_dcrcbias.msl |
| Triggering looks ok this time | |
| 1608 | Ruiren enters lab |
| 1612 | fill lN2 cold trap bath |
| 1612 | Tower/MC/Coldplate = 96.7/31.3/187 mK, Still = 1.49 K / 0.130 mbar / 0 mW, G1/G2= 189/180 mbar, 1K Pot = 1.67 K / 36±2 mbar. |
| 1614 | Ruiren leaves lab |
| 2343 | Start 31min series of 7V data (bias applied after 1 min), with 1000 beginning randoms, trigger threshold 40/40/40/40 on DCRC3qI/qO/DCRC1qI/qO, 5 Hz in-run randoms, with 1.6384 ms pulses (8192 length) and 400 us prepulse (500 length). Use sequence r74_takeandflash_dcrcbias.msl |
| Triggering looks OK |