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2020/10/16 (Friday)

Previous Day

  • Lab in-person: Ruiren
  • Virtual partner: Matt
Setup Run 73. DIB 1/3/4 → Stripline 43/48/41 → pi-filters 1/2/3 → Cable 3/1/2 → nothing/nothing/accessory_interposer → HV_Conn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC55(1)-master; DCRC33(2) → HV control. DCRCs on. Lead/poly shield erected (4 lead walls, 2 poly walls).
0600 MB = 68.9%. Note: In standard Slow mode, the level meter updates every 60.052 minutes.
0710 Tower = 62.8 mK. Wandered between 63 and 66 mK over the last hour.
0736 Start a 60 min series at HV = 0V,
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = set automatically to track temperature, Front-End Gains = (3/3/3)/(5/5/5)
1000 BOR & 5 Hz in-run randoms, trigger on DCRC1pD threshold = 8
Use sequence SimpleDataLoopNoFlash.msl \\Use QETbias_update.c, function sequence_update_QETbiases(62,30)
0836 Tower temperature generally fell from 61.5 to 59 mK during the serious, with a lot of up and down swings along the way.
0900 Tower = 58.0 mK, generally falling
0931 Start a 60 min series at HV = -300V, drifting 0.0305 V/s, prebias 15% for 2min,
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = set automatically to track temperature, Front-End Gains = (3/3/3)/(5/5/5)
1000 BOR & 5 Hz in-run randoms, trigger on DCRC1pD threshold = 8
Use RootSequencer.c, function drift_sequence(300,0.0305)
Use QETbias_update.c, function sequence_update_QETbiases(70,30)
0931 Vtest = -2.4 mV shortly after drift begins. Rootsequencer says drift starts at -315.6 V. 0.30% HV loss.
Tower temperature stayed close to 57.6 mK for 40 minutes, then climbed to 59.1 mK. For the last 10 minutes it had fallen to around 58.3 mK.
1032 Vtest = -3.2 V at end of drift. HV = -425.4 V according to RootSequencer. 0.30% HV loss.
Drift rate looks about right. Between 40 and 50 minutes the gain is a bit too high, suggesting that the QETbias updater overcompensated a bit.
1155 Tower = 57.0 mK. Cooling.
1221 Start a 60 min series at HV = -100V, drifting 0.0285 V/s, prebias 15% for 2min,
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = set automatically to track temperature, Front-End Gains = (3/3/3)/(5/5/5)
1000 BOR & 5 Hz in-run randoms, trigger on DCRC1pD threshold = 8
Use RootSequencer.c, function drift_sequence(100,0.0285)
Use QETbias_update.c, function sequence_update_QETbiases(70,30)
1221 Vtest = -0.7 mV shortly after drift begins. Drift starts at -108.3 V. 0.26% HV loss.
Tower temperature started around 56.8 mK and fell steadily to 56.5 mK during series. Better than most series.
1322 Vtest = -1.2 V at end of drift. HV = -210.3 V. 0.23% HV loss.
Drift was too slow.
1351 swap HV bias leads to positive polarity
1000 Ruiren body temperature = 36.5 C
1359 Tower/MC/Coldplate = 59.6/32.0/197 mK, Still = 1.52 K / 0.120 mbar / 0 mW, G1/G2= 233/217 mbar, 1K Pot = 1.63 K / 22±2 mbar.
1351 fill in lN2 cold trap dewar
1410 Ruiren leaves lab
1420 Tower = 57.7 mK, cooling
1630 Tower = 56.7 mK, slowly cooling
1637 Start a 60 min series at HV = +100V, drifting 0.0262 V/s, prebias 15% for 2min,
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = set automatically to track temperature, Front-End Gains = (3/3/3)/(5/5/5)
1000 BOR & 5 Hz in-run randoms, trigger on DCRC1pD threshold = 8
Use RootSequencer.c, function drift_sequence(100,0.0262)
Use QETbias_update.c, function sequence_update_QETbiases(70,30)
this was a mistake - I'm using the drift rate for +300V, not the drift rate for +100V.
1637 Vtest = 0.8 mV shortly after drift begins. Drift starts at 107.9 V. 0.30% HV loss.
1720 Seeing weird pulse shapes in DCRC1pB/Side1pA. Pulses are undershooting. Maybe need to retune SQUID? Or zap?
Tower started at 56.7 mK and settled to 56.6 mK. Nice and constant
1738 Vtest = 1.2 V at end of drift. Final HV = +201.6 V. 0.24% HV loss.
1835 Tower = 57.4 mK, cooling
1835 DCRC1pB SQUID modulation curve looks weird. Let's zap.
1835 Zap DCRC1 SQUIDs
1855 DCRC1pB SQUID modulation looks much better after the zap! Retune SQUID
1855 DCRC4 channels have problems now though. Can't lock pB, and pC doesn't seem to be time-synced with DCRC1 (??)
1855 Zap DCRC1&4 SQUIDs
1905 Channels look ok but DCRC4 is out of time sync with DCRC1. hmm. I blame the SQUID tuning thing.
1910 Turn DAQ programs off and on. Time sync working. But now some channels look like they have really low amplitudes, and DCRC1pB has weird noise. Zap again…
1915 Zap DCRC1&4 SQUIDs
1935 dammit - DCRC2 was set to version 3.1 again - screwed up the HV, now there's some nasty high voltage on the detector.
1935 Stop DAQ programs, reset DCRC2 to version 3, restart programs.
1940 HV goes back to zero. Guess we need to flash the detector now.
1940 Flash detector
2030 Tower = 56.7 mK and cooling. Channels look OK.
2045 Tower = 56.5 mK, probably still cooling a bit
2053 Start a 60 min series at HV = +300V, drifting 0.0262 V/s, prebias 15% for 2min,
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = set automatically to track temperature, Front-End Gains = (3/3/3)/(5/5/5)
1000 BOR & 5 Hz in-run randoms, trigger on DCRC1pD threshold = 8
Use RootSequencer.c, function drift_sequence(300,0.0262)
Use QETbias_update.c, function sequence_update_QETbiases(70,30)
2053 Vtest = 2.0 mV shortly after drift begins. Drift starts at 313.4 V according to RootSequencer. 0.26% HV loss.
Tower started at 56.5 mK and settled to 56.1 mK. Pretty good.
2154 Vtest = 2.6 V at end of drift. Final HV = +407.7 V according to RootSequencer. 0.26% HV loss.
2005 On Arduino browser tab do “rd dwell”: 40 ms, good.
2022 Move source -4×82 steps with 4 minute pause after each move, mvNwait -4 240 82
This should move the source to y = -29.501 mm warm (-29.381 mm cold, after correction for differential contraction). Middle of pD. Total sequence should take 5hr 28min, ending at 3:50 am.

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