2020/07/29 (Wednesday)
- Lab in-person: Matt
- Virtual partner: Zach, Michael
| Setup | Run 73. DIB 1/3/4 → Stripline 43/48/41 → pi-filters 1/2/3 → Cable 3/1/2 → nothing/nothing/accessory_interposer → HV_Conn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC55(1)-master; DCRC33(2) → HV control. DCRCs on overnight. Lead/poly shield erected (4 lead walls, 2 poly walls). |
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| 0840 | MB = 27.2% |
| See yesterday for notes on adjusting the HV drift rate to try to flatten out the Luke gain. | |
| 0925 | Build a new sequence for 5-Volt data, with no pre-biasing, changing drift rate to 0.0214 V/s. python HVscan.py -iDCRC 2 -HVs 5 -HVcalFile HV_calibrations/HV_DCRC2_control_cals_500V_200721.txt -HVdriftRate 0.0214 -tSeries 60 -DCRCs2Flash 1 » ../../sequencer/HVdrift_5V_21p4mVps_nopre_60min.msl |
| 0930 | Check phonon channels with pulse viewer - all look fine. |
| 0931 | Start a 60 min series at HV = 5V, drifting 0.0214 V/s, no prebias, CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (0,320,390,0)/(0,360,420,440) uA, Front-End Gains = (3/3/3)/(5/5/5) 1000 BOR randoms, trigger on DCRC1pD threshold = 8 Use sequence HVdrift_5V_21p4mVps_nopre_60min.msl |
| 0932 | Vtest ~ 0.3 mV |
| 0935 | Tower = 52.9 mK |
| 1005 | Vtest ~ 2.0 mV |
| 1037 | Vtest ~ 3.4 mV, drift ends |
| 1225 | Tower/MC/Coldplate = 54.8/31.7/192 mK, Still = 1.50 K / 0.18 mbar / 5 mW, G1/G2= 396/366 mbar, 1K Pot = 1.65 K / 28±2 mbar. |
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| NOTE: fridge is still cooling after flash 2 hours ago | |
| 1304 | Begin LHe transfer @ MB = 17.9% |
| 1315 | Check HV output, which should be 0V - actual 30 mV. Pretty low. |
| 1315 | Swap the red&black banana cables on the HV output. We are now set up for negative bias. |
| 1335 | Fill LN2 cold trap bath |
| 1345 | End LHe transfer @ MB = 92.1% |
| 1420 | Fill the 25L Bomb Dewar with LN2 from LN2 Storage Dewar, because it is a little low - level indicator is at around 60%. After filling the Bomb Dewar we'll take the Storage Dewar to the 1st floor for Mike to refill. Then we'll do fills from the Bomb Dewar until it is empty. We'll want to start the N2 E-box purge though as soon as we get the Storage Dewar back. |
| 1435 | MB = 91.9% |
| 1515 | Start a 60 min series at HV = -5V, drifting -0.0214 V/s, no prebias, CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (0,320,390,0)/(0,360,420,440) uA, Front-End Gains = (3/3/3)/(5/5/5) 1000 BOR randoms, trigger on DCRC1pD threshold = 8 Use sequence HVdrift_5V_21p4mVps_nopre_60min.msl |
| 1515 | Vtest ~ -0.4 mV |
| 1515 | Tower = 53.9 mK |
| 1515 | Matt leaves lab |
| 1608 | Vtest ~ -4.0 mV |
| 1621 | Vtest ~ -5.2 mV, drift ends |
| 1621 | Tower = 52.8 mK |
|
| Interestingly -5V seems to show higher Luke gain than +5V, the reverse of what's seen at high biases. |
| 2005 | Build a new sequence to run constant -10 Volt data for 12 minutes, then step back to 0V, taking data the entire time. I'll edit the file to remove the drift part and start the data before ramping the bias. python HVscan.py -iDCRC 2 -HVs 10 -HVcalFile HV_calibrations/HV_DCRC2_control_cals_500V_200721.txt -HVdriftRate 0.0214 -tSeries 1 -DCRCs2Flash 1 » ../../sequencer/HV_0V_4min_10V_12min_10V_12min.msl |
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| 2020 | Check phonon channels, all look OK |
| 2024 | Start a series at 0V for 4min, then -10V for 12 min, then 0V for 12min. , CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (0,320,390,0)/(0,360,420,440) uA, Front-End Gains = (3/3/3)/(5/5/5) 1000 BOR randoms, trigger on DCRC1pD threshold = 8 Use sequence HV_0V_4min_10V_12min_10V_12min.msl |
| 2025 | Tower = 52.2 mK |
| 2029 | Vtest ~ -0.9 mV, after reaching -10V bias |
| 2035 | Vtest ~ -0.7 mV, in the middle of the -10V period |
| 2041 | Vtest ~ -0.7 mV, near end of the -10V period |
| 2052 | Vtest has settled down to -0.02 mV and is still falling toward the before-bias value of -0.04 mV, so it is probably not quite neutral yet, 11 minutes after removing bias. |
| 2103 | Vtest has settled down to -0.03 mV, 22 minutes after removing bias. |
| 2121 | Vtest has settled down to -0.035 mV, 40 minutes after removing bias. |


