2019/06/21 (Friday)
| Setup | DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer ?/3/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC55(1) DCRC33(2) → 1kV power supply → HV input Three walls of the lead/poly shield are up. |
|---|---|
| 0855 | Tower/MC/Coldplate = 40.6/30.8/200 mK, Still = 1.27 K / 0.090 mbar, G1/G2 = 156/150 mbar, 1K Pot = 1.63 K / 22 mbar. MB = 66.8% |
| 0904 | Fill LN2 cold trap bath |
| 0928 | Start a 30 min series at HV = 0V CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pB/C/D threshold = 8/8/8. |
| 1003 | Unplug HV cable from HV board. |
| 1004 | Start a 30 min series at HV = 0V, unplugged CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pB/C/D threshold = 8/8/8. |
| 1108 | Start a 30 min series at HV = 0V, unplugged CDMS detector: Driver Gains = 2x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pB/C/D threshold = 8/8/8. |
| 1121 | Abort run, channels railed. |
| 1127 | Start a 30 min series at HV = 0V, unplugged CDMS detector: Driver Gains = 2x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pB/C/D threshold = 16/16/16. Note: Data showed that DCRC4 actually had 4x gain. |
| 1230 | Play with FE gains. They're about as high as possible without oscillating. |
| 1247 | Try R66 QET biases: HV 1/2 = (480/360/440)/(480/380/490) uA (from 2017/1229). Just looking at pulses and PSDs in the pulse viewer, the noise doesn't seem much different. |
| 1312 | Play with QET biases a bit. Adjust channels to be above electro-thermal oscillation region. Set QET bias just above where oscillation hump starts to show in PSD. |
| 1322 | Fridge computer spa-vuk1 is unresponsive AGAIN! |
| 1325 | Start a 30 min series at HV = 0V, unplugged CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (500/425/410)/(500/485/510) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pB/C/D threshold = 8/8/8. |
Calibrated PsumOF to 60keV in these series.
| Series | State | 60keV position (PsumOF*1e9) | Noise width (eV) |
|---|---|---|---|
| 07190613_1711 | HV = 0V | 176 | 687 ± 17 |
| 07190621_0928 | HV = 0V | 177 | 780 ± 9 |
| 07190621_1004 | HV unplugged | 177 | 642 ± 7 |
| 07190621_1127 | HV unplugged, 2x/4x driver gain | 356 | 641 ± 7 |
| 07190621_1325 | HV unplugged, higher QET | 136 | 695 ± 7 |
- Not sure why the 0928 series has such high noise, but it does seem that unplugging the HV helps a little bit. These values are still much above the ~300 eV 0V noise observed in R66.
| 1502 | Restart spa-vuk1. |
|---|---|
| 1505 | Restore standard QET biases. |
| 1506 | Start 30 min mini-bake. |
| 1530 | Tower temp flattens out around 345 mK |
| 1624 | The bake sequence was set up wrong and stuck in an infinite loop. Turn off LEDs and 15V power manually. |
| 1625 | Fill LN2 cold trap. |
| 1710 | Plug HV back into HV board. |
| 1714 | Tower = 41.3 mK and falling. |
| 2000 | Tower = 40.6 mK and flat. |
| 2004 | Start a 30 min series at HV = 0V CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pB/C/D threshold = 8/8/8. |