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2019/06/20 (Thursday)

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Setup DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer ?/3/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC55(1)
DCRC33(2) → 1kV power supply → HV input

Three walls of the lead/poly shield are up.
0905 Tower/MC/Coldplate = 40.7/30.9/200 mK, Still = 1.27 K / 0.090 mbar, G1/G2 = 156/153 mbar, 1K Pot = 1.63 K / 22 mbar. MB = 36.5%
0910 Fill LN2 cold trap bath
  • Last night's data suggests the drift rate is slightly too high. Let's change from 2.52 V/min to 2.49 V/min = 0.0415 V/s
1202 Start a 45 min series at HV = 100V, with 10% prebias for 2 minutes, flash at end with 30 min wait.
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR, 5Hz InRun, 1000 EOR randoms, trigger on DCRC1pB/C/D threshold = 8/8/8.
Use sequence HV_100V_cal0612_prebias_10_2_dur_45min_flashDCRC_1_4.msl
1319 Fridge computer spa-vuk1 won't wake up. Manually restart it.
It installs some updates and restarts again. Log in, seems okay.
1332 Commence LHe transfer. MB = 30.1%
1423 Cease LHe transfer. 88.4%
Training folks, so closing and extracting the transfer tube was a bit slower than normal. Tower temp spiked to 62 mK, then returned to base.
1438 Tower = 41.2 mK
1439 Start a 75 min series at HV = 180V, with 10% prebias for 2 minutes, flash at end with 30 min wait.
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR, 5Hz InRun, 1000 EOR randoms, trigger on DCRC1pB/C/D threshold = 8/8/8.
Use sequence HV_180V_cal0612_prebias_10_2_dur_75min_flashDCRC_1_4.msl
1535 Build new sequence for drifted-HV data, when we start taking that again. 2.49 V/min = 0.0415 V/s.
[fritts@jiajin /home/hep/cdmssoft/scdmsDAQ/MidasDAQ/online/scripts/pysequencer]: python HVscan.py -iDCRC 2 -HVs 180 -HVcalFile HV_calibrations/HV_DCRC2_control_cals_440V_190612.txt -HVdriftRate 0.0415 -HVpreBias 10/2 -tSeries 88 -DCRCs2Flash 1,4 > ../../sequencer/HVdrift_180V_cal0612_2p49VPM_prebias_10_2_dur_88min_flashDCRC_1_4.msl
1632 Fill LN2 cold trap full.
1646 Start a 90 min series at HV = 220V, with 10% prebias for 2 minutes, flash at end with 30 min wait.
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR, 5Hz InRun, 1000 EOR randoms, trigger on DCRC1pB/C/D threshold = 8/8/8.
Use sequence HV_220V_cal0612_prebias_10_2_dur_90min_flashDCRC_1_4.msl
2010 Start a 125 min series at HV = 300V, with 10% prebias for 2 minutes, flash at end with 30 min wait.
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR, 5Hz InRun, 1000 EOR randoms, trigger on DCRC1pB/C/D threshold = 8/8/8.
Use sequence HV_300V_cal0612_prebias_10_2_dur_125min_flashDCRC_1_4.msl

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