2019/04/08 (Monday)
| Setup | DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer 3/?/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC50(3) DCRC33(2) → 1kV power supply → HV input Lead poly shield is erected, N/E/W walls complete, no poly or lead on S wall. |
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| 0950 | Tower/MC/Coldplate = 57.8/49.9/191 mK, Still = 1.73±0.15 K / 0.150 mbar, G1/G2 = 328/311 mbar, 1K Pot = 1.77 K / 13 mbar. MC heater = 10 μW. MB = 71.0% |
| 1002 | Fill LN2 cold trap full. |
| 1005 | Plug HV measurement back into HP 3478A multimeter. Turn HV up to 300V using HVchange_0_to_300.msl |
| 1008 | Vleak grows like 1-exp, asymptoting to about 20 mV. |
| 1011 | HV=160 V, Vleak jumps from 20 mV to 159 mV, then grows linearly. Tower also starts warming from 57.5 mK. |
| 1015 | At HV=298V, Vleak also goes flat at 0.50 V. Tower = 58.2 mK |
| 1018 | Turn off DCRC programs and power down DCRCs 3,4. Doesn't make a difference. Tower = 59.3 mK. |
| 1026 | Power up DCRCs 3,4 and start DCRC programs. Turn down HV using HVchange_300_to_0.msl |
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| Logged tower temp, HV, and Vleak during the above test Inferred short resistance range is Rshort=600 MΩ @ 160V to Rshort=200 MΩ @ 300V At 300V, this also implies we're dumping 50uW somewhere. |
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| 1046 | Tower = 62.6 mK and slowly warming. Phonon channels all show nice pulses. |
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| 1049 | Set QET biases to 0 anyway. |
| 1055 | Tower flattening out at 62.7 mK |
| 1100 | Tower = 62.6 mK Power down DCRCs 3,4 again. |
| 1115 | Tower = 62.4 mK. What's holding the temp up now? Set MC heater 10 → 0 uW Tower temp drops like a stone. |
| 1126 | Tower = 45.1 mK and falling |
| 1135 | Tower = 41.4 mK and falling |
| 1138 | Looks like it will flatten out under 40 mK. Let's turn the heater back on. Set MC heater 0 → 5 uW |
| 1150 | Tower = 53.3 mK and flattening out. |
| 1322 | Tower = 51.1 mK |
| 1332 | Let's try to pinpoint the leakage location. The HV should only be going down DIB4 pA. With DCRCs 3,4 off, unplug cables 1,3 from HV board. Disable DCRCs 3,4 in ODB. Turn HV up to 300V using HVchange_0_to_300.msl |
| 1337 | HV=135 V, Vleak jumps from 16 mV to 115 mV, then grows linearly. |
| 1342 | At HV=298V, Vleak also goes flat at 0.50 V. Tower = 51.3 mK, much less warming than previous trial. |
| 1400 | Set up Dsub switchboard to have all lines connected except PA-related lines. Put this between HV board and cable 2. Turn HV up to 300V using HVchange_0_to_300.msl |
| 1412 | HV=297 V, Vleak = 2.5 mV. So no leaks in the board itself. Turn down HV using HVchange_300_to_0.msl |
| 1425 | Tower = 50.9 mK |
| 1428 | Change switchboard to also connect DIB4 pA QET bias/ret lines. Now we're biasing DIB4 as normal, except the DIB4 pA SQUID bias/ret and FB coil/ret lines, which are floating. Turn HV up to 300V using HVchange_0_to_300.msl |
| 1436 | HV=126 V, Vleak jumps from 17 mV to 80 mV, then grows linearly. |
| 1441 | At HV=298V, Vleak also goes flat at 0.50 V. Tower = 51.0 mK, no clear heating, but I didn't wait very long. Turn down HV using HVchange_300_to_0.msl |
| 1457 | Change switchboard to also connect all DIB4 lines except PA QET bias/ret. So we're applying bias to the PA SQUID bias/ret and FB coil/ret lines, while the PA QET/ret lines and electrode float. Turn HV up to 300V using HVchange_0_to_300.msl |
| 1500 | HV=112 V, Vleak jumps from 16 mV to 73 mV, then grows linearly. |
| 1510 | At HV=298V, Vleak also goes flat at 0.46 V. Tower = 50.5 mK, no heating. At switchboard, carefully measure voltage of PA QET ret relative to chassis. This is floating at around 6V. |
| 1514 | Turn down HV using HVchange_300_to_0.msl |
| 1530 | Change switchboard to also connect DIB4 lines except PA QET bias/ret and PA SQUID bias/ret. So we're applying bias to just FB coil/ret lines, while the PA QET/ret lines, electrode, and SQUID/ret float. Turn HV up to 300V using HVchange_0_to_300.msl |
| 1533 | HV= 110 V, Vleak jumps from 15 mV to 70 mV, then grows linearly. |
| 1542 | At HV=298V, Vleak also goes flat at 0.46 V. Tower = 50.6 mK, no heating. At switchboard, chassis → PA QET ret = 6V, chassis → PA SQUID bias = 1V. |
| 1545 | Turn down HV using HVchange_300_to_0.msl |
Conclusions:
- Leakage is not in the HV board or DCRCs.
- Leakage occurs through DIB4 pA QET, SQUID, and FB lines
- At 300V, we dump 50 uW somewhere in fridge, but tower heats by no more than 3 mK (c.f. 5 uW heater @ MC changes tower by 11 mK)
- Probably occurring in stripline, SQUET, or SQUID card, but not tower/detector
| 1645 | Plug detector cables back into HV board without switchboard. |
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| 1705 | Fill LN2 cold trap full. |
| 1707 | Power up DCRCs 3,4. Re-enable them in the ODB and start up dcrc programs. |
| 1710 | Zap SQUIDs. |