2019/04/02 (Tuesday)
| Setup | DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer 3/?/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC50(3) DCRC33(2) → 1kV power supply → HV input Lead poly shield is erected, N/E/W walls complete, no poly or lead on S wall. |
|---|---|
| 0930 | Tower/MC/Coldplate = 40.3/29.9/186 mK, Still = 1.70±0.15 K / 0.150 mbar, G1/G2 = 294/275 mbar, 1K Pot = 1.77 K / 13 mbar. MB = 72.4% |
| The Tower temperature has been a little unstable lately, kind of oscillating by about 1 mK, unevenly but with a characteristic period around 10 minutes. Overnight it seemed to settle down to normal between about 7:30 pm and 5:00 am, but then returned to the uneven state. | |
| 1004 | Relock and snap DIB4 channels. DIB4 pC is ringing at its nominal QET bias setting of 500 uA, bump this up to 520 uA and things look okay. |
| 1018 | Start sequence to turn up bias, prebias, and then drift from 300 V → 400 V. Sequence is named looptest_HVdrift_fast_300V_3p9VPM_prebias_15_1_dur_26min_nologger_nodecrease_noflash.msl |
| 1025 | Perform manual IBIS on DCRC4pA/B/C |
| 1055 | Sequence has reached the end, HV = 400V. Dial down HV to 0V. |
| 1104 | Fill LN2 cold trap bath. |
| DCRC4 IbIs, Tower ~ 40 mK, HV drift 300→400V | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| DCRC4pA | DCRC4pB | DCRC4pC | ||||||||
| driver gain: | 1 | driver gain: | 1 | driver gain: | 1 | |||||
| Tower | 39.9 | mK | Tower | 39.8 | mK | Tower | 39.8 | mK | ||
| QET bias | Vout | oscillation noise | QET bias | Vout | oscillation noise | QET bias | Vout | oscillation noise | ||
| 800 | -0.243 | -6.4 | 800 | -0.461 | -6.3 | 800 | 0.057 | -6.3 | ||
| 600 | 0.1465 | -6.4 | 600 | -0.027 | -6.3 | 600 | 0.479 | -6.4 | ||
| 500 | 0.2 | -5.8 | 500 | 0.179 | -6.3 | 500 | 0.528 | -5.9 | ||
| 480 | 0.11 | -4.7 | 480 | 0.218 | -6.3 | 480 | 0.44 | -2.7 | ||
| 460 | -0.49 | -4.3 | 460 | 0.237 | -6.2 | 460 | 0.32 | -4 | ||
| 440 | -0.64 | -5.5 | 440 | 0.245 | -6.2 | 440 | 0.18 | -5.3 | ||
| 420 | -0.78 | -5.3 | 420 | -0.304 | -6 | 420 | -0.07 | -5.3 | ||
| 400 | -0.78 | -5.3 | 400 | -0.36 | -5.4 | 400 | sc | |||
| 380 | sc | 380 | -0.48 | -5.4 | jagged noise | |||||
| 360 | -1.1 | -5.6 | throughout | |||||||
| 340 | -1.32 | -3.2 | transition | |||||||
| 320 | sc | |||||||||
| Oscillation Noise is log of PSD readout at around 15 kHz | ||||||||||
| Reasonable QET biases for DCRC4 at 300→400V are 440/380/430. But hard to know if these are stable, and pC may have significant ringing after strong pulses. | |
| we're considering raising the Tower temperature in an attempt to avoid oscillations. | |
| 1127 | Start sequence to turn up bias, prebias, and then drift from 300 V → 400 V. Sequence is named looptest_HVdrift_fast_300V_3p9VPM_prebias_15_1_dur_26min_nologger_nodecrease_noflash.msl |
| 1135 | Perform manual IbIs on DCRC3 pC/D |
| 1205 | Dial down HV to zero |
| DCRC3 IbIs, Tower ~ 40 mK, HV drift 300→400V | ||||||
|---|---|---|---|---|---|---|
| DCRC3pC | DCRC3pD | |||||
| driver gain: | 1 | driver gain: | 1 | |||
| Tower | 39.7 | mK | Tower | 39.6 | mK | |
| QET bias | Vout | oscillation noise | QET bias | Vout | oscillation noise | |
| 800 | -0.389 | -6.1 | 800 | -0.167 | -6.3 | |
| 600 | -0.175 | -6 | 600 | 0.261 | -5.8 | |
| 500 | -0.113 | -6.1 | 500 | 0.434 | -5.6 | |
| 480 | -0.408 | -6 | 480 | 0.42 | -5.6 | |
| 460 | -0.423 | -5.9 | 460 | 0.34 | -3.6 | |
| 440 | -0.22 | -3 | 440 | 0.22 | -4.8 | |
| 420 | -0.21 | -3.3 | 420 | 0.21 | -4.4 | |
| 400 | -0.28 | -5.2 | 400 | -0.46 (sc) | ||
| 380 | -0.34 | -5 | 380 | sc | ||
| 360 | sc | |||||
| highly distorted pulses at 380-400 | ||||||
| Oscillation Noise is log of PSD readout at around 15 kHz | ||||||
| Reasonable QET biases for DCRC3pC/D at 300→400V are 460/410. For pC this is pretty high in its transition - any lower we hit oscillations or ugly distortions. | |
| 1247 | Start a background series at HV = 300→400V @ 3.9 V/min (26 min duration) with 1 minute 15% prebias CDMS detector: Driver Gains = 1x, DCRC4/3 QET biases = (440/380/430)/(500/460/410) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR randoms, trigger on DCRC4pA/B/C threshold = 6/6/6 use sequence looptest_HVdrift_fast_300V_3p9VPM_prebias_15_1_dur_26min.msl |
 |
| Today's data: Balanced sum of OFs versus time. Calibrating this to the 10 keV line in the first 10 minutes, I get a noise width around 88 eV. Note that the HV drift seems to be too fast, should be 75% of current rate, so 3.9→2.9 V/min. This is likely because the HV leakage lower now. |
| 1450 | MB = 64.9% |
|---|---|
| 1455 | Chad is going to service cdms2 this afternoon. Let's shut down the DAQ for that. |
| 1600 | Fill LN2 cold trap bath |