2019/03/19 (Tuesday)
| Setup | DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer 3/?/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC50(3) DCRC33(2) → 1kV power supply → HV input |
|---|---|
| 0920 | Tower/MC/Coldplate = 45.2/31.3/196 mK, Still = 1.95±0.20 K / 0.160 mbar, G1/G2 = 243/219 mbar, 1K Pot = 1.78 K / 16 mbar. MB = 73.0% |
| Tower peaked a few times overnight, by 1 or 2 mK | |
| 0925 | Fill LN2 cold trap bath |
| 1040 | Finish installing lead on North lead/poly shield wall. (Now N, E, W walls complete, and there is lead on the bottom. No lead or poly on S.) |
| 1045 | Estimate event rate from looking at 30 52.488 ms traces in DCRC3pC, count a total of 74 pulses, so rate is 47±5 Hz. |
| This is half the event rate before the shield, so we expect roughly speaking that the counterbias will build up around half as fast as before. (Actually it should go as count rate times average energy per event. The shield will be less effective at blocking high energy gammas so could be that the difference in counterbias rate may be less dramatic.) | |
| 1050 | At 10:43 Tower temperature had increased 45→47.5 mK. All channels still showed pulses but two (DCRC4pB&C) had somewhat strong oscillations, so I increased the QET bias of each of these by 100 uA temporarily, to eliminate the oscillations. Since then the temperature has been falling. |
| 1115 | Begin increasing HV. Start seeing some jagged breakdown noise around 167 V. |
| 1125 | Reach HV = 201.3 V, Vtest = 41 mV and falling |
| 1127 | Start background series at HV = 201.3V CDMS detector: Driver Gains = 1x, DCRC4/3 QET biases = (410/370/440)/(400/370/420) uA, Front-End Gains = (4/2/3)/(10/15/10) 1000 BOR randoms, trigger on DCRC3pB threshold = 7 |
| 1128 | HV = 201.3 V, Vtest = 27.7 mV |
| 1130 | HV = 201.3 V, Vtest = 25.0 mV |
| 1135 | HV = 201.3 V, Vtest = 22.8 mV. Tower = 46.5 mK and flat. |
| 1140 | HV = 201.3 V, Vtest = 21.8 mV |
| 1145 | HV = 201.3 V, Vtest = 21.4 mV |
| 1150 | HV = 201.3 V, Vtest = 21.2 mV |
| 1200 | HV = 201.3 V, Vtest = 20.8 mV |
| 1215 | HV = 201.3 V, Vtest = 20.8 mV |
| 1240 | HV = 201.3 V, Vtest = 20.7 mV |
| 1300 | HV = 201.3 V, Vtest = 20.5 mV |
| 1301 | Dial HV down to 0 V using sequence change_HV_201_to_0_DCRC2_440V.msl. |
| 1308 | Sequence finished. HV = 0.25 V, Vtest = -60 mV, so still 24 V on electrode. |
| 1309 | HV = 0.25 V, Vtest = -22 mV, so Velectrode = 9 V |
| 1311 | Adjust DCRC2qI bias to 11.545 V to get closer to 0 V (HV = 14 mV). From Friday's calibration it should be qI = 11.535 V. |
| 1312 | HV = 0.012 V, Vtest = -4.5 mV, so Velectrode = 1.8 V |
| 1318 | HV = 0.017 V, Vtest = -1.7 mV, so Velectrode = 0.7 V |
| 1355 | HV = 0.050 V, Vtest = 0.02 mV, so Velectrode = 0.04 V |
| 1404 | Stop data |
| LazyLogger is not working, so we will stop and restart the MIDAS DAQ. | |
| 1425 | MB = 65.7% |
| 1540 | Took a look at today's data. Estimated the counterbias growth rate by looking at the slope of the 60keV line with time, looking at later times (because it looks like maybe it was pretty saturated early on), and extrapolating back to 11:15 when the bias was first applied. Result: about -2.2 V/min. This is indeed around half the rate from before the shield was in place, when the event rate was twice as high. |
| 1605 | Fill LN2 Cold Trap to full |
| 1635 | MB = 62.6% |