UMN CDMS Wiki archive
start › cdms › k100 › run_diary › 20180716

2018/07/16 (Monday)

Previous Day

Setup: DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer 3/?/2 → HVConn 1/3/2 → HV 1/2 → DCRC55(1)/DCRC50(3)
0932 Tower/MC/Coldplate = 33.7/31.0/191 mK, Still = 1.5 K / 0.140 mbar / 4 mW, G1/G2 = 144/137 mbar, 1K Pot = 1.59 K / 18 mbar. MB = 69.8%
0936 Fill LN2 cold trap full.
0940 Set HV=40V with 15% prebias for 5 min using script changeHV_0_40_preBias15_5.msl
0950 All channels are currently railed. Relocking them works. All channels are showing lots of jagged pulses. Kinda looks like breakdown noise, that's strange.
1000 Apply QET bias settings chosen at 100 V from 2018/06/01
channel QET bias [uA]
DCRC1pA 290
DCRC1pB 270
DCRC1pC 315
DCRC3pB 140
DCRC3pC 315
DCRC3pD 310
1001 Still seeing breakdown noise in all channels. Seeing an apparent rate of ~10 events/3.2768 ms in randoms. Can't really take data like this, so I'll just let it sit for a while and see if it settles.
1030 Tower = 31.3 mK and cooling. Still seeing breakdown noise.
1055 Looks like breakdown noise still.
Dial HV down to 0 V using sequence script changeHV_40_0.msl, we'll see what happens.
1215 HV = 0 now but jagged noise is still present. It must not be breakdown noise.
1228 Zap SQUIDs
1238 Jagged noise still present. Disable Logging of HP 3478A and Keithley in OMNI_Logger. Switch off Keithley and HP multimeters. Noise remains. Switch off HV supply. Noise remains. Power HV supply and multimeters back on, restore multimeter logging.
1340 Jagged noise still present. Let's try turning some things off while watching DCRC1PA. Set all QET biases=0 uA except DCRC1PA. Noise remains on DCRC1PA. Look at DCRC1PB, which is now SC. There is a small, but coherent ~300Hz oscillation in the baseline. This baseline oscillation is improved by switching off the HV power supply. That doesn't fix the jagged transition noise though.
1350 Restore QET biases to the above values.
1355 Stop DCRC programs, power cycle DCRCs 1,3. Restart DCRC programs. Tower spikes to 165 mK, but cools quickly to ~33 mK.
1405 Jagged noise is still present. [image not archived: doubt.svg]
1410 Try triggering on DCRC3pD rather than looking at randoms. See a lot of spike-like pulses. Not many strong pulses, which is strange.
1415 Try turning 15V Power off on DCRC3. No change in noise pattern or temperature with 15V Power on or off on DCRC3
Try turning 15V Power off on DCRC3. Temperature rises to 300 mK. Turn power on again, temperature falls again.
1420 With tower still hot, we continue to see spike-like pulses even though the channels are normal, no event-like pulses.
1430 Adjusting the QET bias downward on DCRC3pD we no longer see the spikes and see more regular pulses. But there's lots of jagged noise (that looks a bit like low energy very-high-rate events)
1435 Zap SQUIOs on DCRC1,3 twice. Haven't done that since the power cycle.
1445 Can see strong pulses, but lots of the jagged noise still, many small pulses in every trace. (Also we clearly have the timing link working.)
1450 Try turning off DCRC4 (turn off DAQ programs, disable DCRC4 in ODB, unplug DCRC4, turn programs back on). Still seeing jagged noise in all channels.
1455 Try disabling DCRC3 and view pulses on DCRC1. Jagged noise still present.
1455 Try disabling DCRC1 and view pulses on DCRC3. Jagged noise still present.
1505 Reenable and restart all three DCRCs.
1505 Zap SQUIDs again.
1525 Still pressure is only 0.13 mbar. Let's see if we can improve base temperature by kicking up still power.
Increase still power 4→6 mW
1545 Tower cooled a bit, 31.7 → 31.1 mK. Not dramatic.
1550 Pulses on DCRC1 look good but noise still present, really looks a lot like a very high rate of low-energy events. DCRC3 channels are all railed for some reason… actually DCRC3 channels are railed at a random value: -0.15 V. That seems like a frozen DCRC. Hrm.
in telnet session on DCRC3, neither rd 0 nor rd 14 are updating.
1605 Stop DAQ programs and power cycle DCRC3
1615 DCRC3 still seems stuck. Try turning off programs, disable all but DCRC3 and set to master, restart programs: now DCRC3 working.
1615 Noticed timing link cable was not fully inserted in DCRC1. Reseat this then enable and restart with all 3 DCRCs, now all are working.
Noise in the form of high low-energy event rate is still present.
1635 Start a 5-minute bake on DCRCs 1&3
1645 Fill LN2 cold trap bath

Next Day