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2017/10/25 (Wednesday)

Previous Day

Setup: DIB 1/3/4 → 3.2 MHz filters 1/2/3 → cable 1/3/2 → gender changers → rerouting boards 1/3/4 → DCRC55(1)/33(2)/50(3)
Overnight baked for 5 hours.
0931 Tower/MC/Coldplate = 83.5/57.7/366 mK, Still = 1.26 K / 0.20 mbar, G1/G2 = 265/258 mbar, 1K Pot = 1.62 K / 26 mbar. MB = 25.3%
0935 Let's start with a repeat of the last series taken yesterday to see if baking vs flashing makes a difference.
0936 Start series of data with Vbias(external) = -15.00 V, with 1000 beginning randoms, and a 40/30/15/40/40 ADC bin threshold trigger on DCRC1qI/qO/DCRC2qO/DCRC3qI/qO, with trigger baseline = 32 samples and trigger length = 10 samples (these are 2x the usual values).
0958 Stop run, ground and flash for 60 s
1013 Start LHe transfer (MB = 24.0%)
1045 Fill LN2 cold trap.
1121 End LHe transfer (MB = 89.7%)
1131 Start series of data with Vbias(external) = -20.00 V, with 1000 beginning randoms, and a 40/30/15/40/40 ADC bin threshold trigger on DCRC1qI/qO/DCRC2qO/DCRC3qI/qO, with trigger baseline = 32 samples and trigger length = 10 samples (these are 2x the usual values).
1153 Stop run, ground and flash for 60 s
1217 Start series of data with Vbias(external) = -25.01 V, with 1000 beginning randoms, and a 40/30/15/40/40 ADC bin threshold trigger on DCRC1qI/qO/DCRC2qO/DCRC3qI/qO, with trigger baseline = 32 samples and trigger length = 10 samples (these are 2x the usual values).
1238 Stop run, ground and flash for 60 s
1303 Start series of data with Vbias(external) = -30.01 V, with 1000 beginning randoms, and a 40/30/15/40/40 ADC bin threshold trigger on DCRC1qI/qO/DCRC2qO/DCRC3qI/qO, with trigger baseline = 32 samples and trigger length = 10 samples (these are 2x the usual values).
1324 Stop run, ground and flash for 60 s
1347 Start series of data with Vbias(external) = -40.01 V, with 1000 beginning randoms, and a 40/30/15/40/40 ADC bin threshold trigger on DCRC1qI/qO/DCRC2qO/DCRC3qI/qO, with trigger baseline = 32 samples and trigger length = 10 samples (these are 2x the usual values). Noise Triggering ⇒ No DIB1 peaks
1409 Stop run, ground and flash for 60 s
1433 Start series of data with Vbias(external) = -50.00 V, with 1000 beginning randoms, and a 40/30/15/40/40 ADC bin threshold trigger on DCRC1qI/qO/DCRC2qO/DCRC3qI/qO, with trigger baseline = 32 samples and trigger length = 10 samples (these are 2x the usual values). Noise triggering ⇒ No DIB4 peaks
1455 Stop run, ground and flash for 60 s
1516 Start series of data with Vbias(external) = -70.0 V, with 1000 beginning randoms, and a 40/30/15/40/40 ADC bin threshold trigger on DCRC1qI/qO/DCRC2qO/DCRC3qI/qO, with trigger baseline = 32 samples and trigger length = 10 samples (these are 2x the usual values). Noise Triggering ⇒ No DIB1 peaks
1538 Stop run, ground and flash for 60 s
1600 Start series of data with Vbias(external) = -90.0 V, with 1000 beginning randoms, and a 40/30/15/40/40 ADC bin threshold trigger on DCRC1qI/qO/DCRC2qO/DCRC3qI/qO, with trigger baseline = 32 samples and trigger length = 10 samples (these are 2x the usual values).
1622 Stop run, ground and flash for 60 s
1644 Start series of data with Vbias(external) = -110.0 V, with 1000 beginning randoms, and a 40/30/15/40/40 ADC bin threshold trigger on DCRC1qI/qO/DCRC2qO/DCRC3qI/qO, with trigger baseline = 32 samples and trigger length = 10 samples (these are 2x the usual values).
1706 Stop run, ground detector
1707 Begin 12 hour bake
1708 Fill LN2 cold trap full.

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