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2017/05/02 (Tuesday)

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Setup: DIB1/3/4 → 3.2 MHz filters 3/1/2 → cable 3/1/2 →gender changer 3/1/2 → HVConn 1/3/2 → HV 1/2 → DCRC55/DCRC33
PuBe source in paraffin barrel behind shield (west side)
Took NaI-triggered data overnight @50V, looks OK
0840 HV = 50.01 V, Vtest = 1.1 mV, nice and stable. Vdetector = 49.5 V
0840 Tower = 32.9 mK, Main bath = 75.1%
0845 Fill LN2 cold trap bath.
0910 Stop data sequence early, with one series left to go
Turn off MIDAS programs, then disable DCRC4, then make DCRC1 timing master, then restart programs. We'll try taking a self-triggered calibration series in this mode to see if we can improve the DAQ read efficiency, which has only been about 40% in this mode.
0913 Start 1 1-hour data series of 1-sided 50V HV coincidence data with Frontend Gain = (20/20/4)/(3/5/4), OG = 4/2, QET biases = table from Apr 28 with 1000 beginning randoms, no flashing, and a 22ADC bin threshold trigger on DCRC2 pD (Side1 pF). DCRC4 is disabled so no information from NaI setup.
1105 Dial HV down to 0V
1105 Tower/MC/Coldplate = 33.0/30.7/190 mK, Still = 1.2 K / 0.110 mbar, G1/G2 = 235/220 mbar, 1K Pot = 1.681 K / 26 mbar. Main Bath = 71.6%.
1120 Start 30 minute bake with DCRCs 1&2
1225 Dial HV up to 65V. After 10 minutes dial down to 50V.
1240 Get all channels working. DCRC2pD(Side1pF) had “hairy” pulse peaks but reducing Frontend Gain from 4 to 3 fixed it.
1250 HV = 50.01 V, Vtest = 1.9 mV → Vdetector = 49.2 V
Tower has mostly settled, 33.2 mK
1255 Start 1 1-hour data series of 1-sided 50V HV coincidence data with Frontend Gain = (20/20/4)/(3/5/3), OG = 4/2, QET biases = table from Apr 28 with 1000 beginning randoms, no flashing, and a 22ADC bin threshold trigger on DCRC2 pD (Side1 pF). DCRC4 is disabled so no information from NaI setup.
1304 Increase DCRC2pD trigger threshold from 22 to 25. It's triggering too much.
1309 Still triggering too much, don't know what's wrong. Increase threshold from 25 to 30.
1313 Still triggering too much, increase threshold from 30 to 35.
1316 Still triggering too much, increase threshold from 35 to 50.
1400 Stop MIDAS programs, re-enable DCRC4, set DCRC1 to timing slave (DCRC4 is master), restart programs.
1400 Seeing tufts of hair at the top of DCRC2pD(Side1pF) pulses. Set Frontend Gain down from 3 to 2.
1405 Start 20 1-hour data series of 1-sided 50V HV coincidence data with Frontend Gain = (20/20/5)/(3/5/2), OG = 4/2, QET biases = table from Apr 28, with 1000 beginning randoms, no flashing, and a 1500ADC bin threshold trigger on DCRC4 pA (TTL signal) Running OR trigger of NaI detectors with PuBe source on west side of shield. NaI detector C has 311 mV threshold and detector B has 288 mV threshold
1712 Fill LN2 cold trap full.

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