| | Setup: DIB1/3/4 → 3.2 MHz filters 3/1/2 → cable 3/1/2 →gender changer 3/1/2 → HVConn 1/3/2 → HV 1/2 → DCRC55/DCRC33 |
| 0929 | Tower/MC/Coldplate = 33.2/30.8/190 mK, Still = 1.2 K / 0.110 mbar, G1/G2 = 260/222 mbar, 1K Pot = 1.693 K / 30 mbar, Main bath = 35.3%. Boil off rate: faster than slow mode (predicted level: 39.0%). |
| 0935 | Fill LN2 cold trap bath. |
| 0943 | Ground and flash detector. |
| 1049 | Start LHe transfer (MB = 33.3%) |
| 1135 | Measure background rate, count 27 pulses in 1 second in DCRC1pA. So 27 Hz background. |
| 1155 | Try putting 57Co source inside of lead shield, as far as possible from detector. Count 48 pulses in 0.25 seconds, 192 Hz. That's a 47% pileup rate for our standard 3.2768 ms trace length. |
| 1155 | End LHe transfer (MB = 82.7%) |
| 1210 | Adjust 57Co position a bit, this time count 60 pulses in 0.25 sec, 240 Hz, even worse. |
| 1225 | Use two lead blocks to make a slit for the 57Co, count rate: 27 pulses in 1 sec = 27 Hz. |
| 1230 | Make separation wider between blocks, count rate: 49 pulses in 1 sec = 49 Hz |
| 1232 | Make separation wider still, count rate: 73 pulses in 1 sec = 73 Hz. That's 21% pileup. Not bad, let's go with this. |
| 1236 | Start sequence of 4, 1-hour data series of 1-sided 0V HV data with Frontend Gain = (20/20/20)/(-/4/4), OG = 4/2, QET biases = table from Friday, with 1000 beginning randoms, no flashing, and a 15ADC bin threshold trigger on DCRC1 pA |
