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2017/03/15 (Wednesday)

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Setup: DIB1/3/4 → 3.2 MHz filters 3/1/2 → cable 3/1/2 →gender changer 3/1/2 → HVConn 1/3/2 → HV 1/2 → DCRC55/DCRC33
0915 Tower = 33.2 mK, Main Bath = 33.8%. Boil off rate: faster than slow mode (predicted level: 37.5%).
0920 Fill LN2 cold trap bath.
1040 Finish IbIs on DCRC2pD
channel QET bias prefactor QETbias*prefactor Selected QETbias*prefactor New QET bias
DCRC1pA/DIB1pA/Side1pE 127 0.2129 27.04 40 130.2
DCRC1pB/DIB1pB/Side1pB 150 0.3514 52.71 40 143.4
DCRC1pC/DIB1pC/Side1pD 130 0.3014 39.18 40 130.4
DCRC2pC/DIB4pC/Side1pC -150 0.1611 24.16 40 -156.1
DCRC2pD/DIB4pD/Side1pF -150 0.2929 43.93 40 -148.6

DCRC2pD was already close to prefactor*QETbias = 40 μA. Another small adjustment brings all 5 channels to 40 μA.

1526 Start LHe transfer at MB=24.9%
1602 End LHe transfer at MB=70.8%
During the transfer we used 2.75 PSI to pressurize the 250L Dewar, which was low, and the recovery rate during transfer was around 8.8 cuft/min. After the LHe ran out (fell below the transfer stick), the recovery meter rate increased to about 14 cuft/min.
1700 DCRC2 PC and PD railed change their Driver offsets from PC/PD = -0.2/-0.05 to 1.63/1.17
1704 Start sequence of 12, 1-hour data series of 1-sided 0V HV data with Frontend Gain = (20/20/20)/(-/4/3), OG = 4/2, QET biases = table above, with 1000 beginning randoms, no flashing, and a 15ADC bin threshold trigger on DCRC1 pA
1710 Commence 3V background series with HPGe crystal.
1712 Fill LN2 cold trap.

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