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2016/11/06 (Sunday)

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Note that times are CST, changed from CDT
1030 check Rps on all Side 1 QETs and start QET tuning.
Setup: DIB1/3/4 → 3.2 MHz filters → cables 1,2,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3)
1100 Tower/MC/Coldplate = 33.4/34.7/246 mK, Still = 1.3 K / 110 μbar, G1/G2 = 170/150 mbar, 1K Pot = 1.70 K / 32 mbar. MB = 29.4%.
Boiloff rate: closer to slow- than fast-mode
1110 Fill LN2 cold trap bath.
1128 Begin LHe transfer at 28.3%
1200 Finish LHe transfer at 91.5%
1212 Release pressure from main bath
1300 2.5 hours after commencing tuning, all QETs are in transition (and hopefully stable) with between 85pW and 130pW equilibrium bias power. Values recorded in spreadsheet
1310 Release pressure from main bath.
1311 07161106_1310 . 0V noise data set (~26ms) with today's QET biases as a baseline comparison to all the negative Vdet biasing work we plan to do today.
1330 07161106_1330 . -5V noise data set (~26ms). All channels look good.
1357 quickflash
1358 Release pressure from main bath.
1418 07161106_1418 . -15V noise data set (~26ms). DCRC3chB should be checked regarding whether it should be used in pt.
1440 quickflash
1505 07161106_1506 . -30V noise data set (~26ms). DCRC1chC looks horrendous (oscillation at ~8kHz, and higher harmonics). DCRC3chB also must be scrutinized in the analysis.
1535 quickflash
1553 07161106_1553 . -45V noise data set (~26ms). Same as -30V data set above in terms of channels to be aware of in analysis
1619 07161106_1616 . short (4 dump) noise data set going from -45 to 0V
1621 quickflash
1648 07161106_1648 . -60V noise data set (~26ms). DCRC1chC fixed initially, showing small amounts of oscillation by dump 12. DCRC3chB still has some ~100Hz junk. However, the clear shot noise is present on all channels
1710 quickflash
1944 Cf-252 hung inside shield for overnight activation. leaving now.

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