2016/10/19 (Wednesday)
| Setup: DIB1/3/4 → 3.2 MHz filters → cables → DCRC55(1)/33(2)/50(3) | |
| 0855 | Tower/MC/Coldplate = 34.8/36.1/221 mK, Still = 1.25 K / 70 μbar, G1/G2 = 140/130 mbar, 1K Pot = 1.63 K / 12.0 mbar. MB = 68.3% Boiloff rate: close to slow-mode. Yesterday we let pressure out at 12 and 48 minutes after a 89.5% fill |
| 0905 | Fill LN2 cold trap bath |
| 0930 | Had difficulty making a phonon channel trigger on test signal, then finally learned the secret: in the SQUID Control of the pulse viewer GUI, or at /Equipment/Tower01/Settings/DCRC[1,2,3]/General/ on the ODB, you need to set the Signal Generator as the trigger source only on the DCRC that you are using, and set it to Threshold on the other DCRCs. |
| 1015 | Measure DIB1pA phonon response to a test signal versus QET bias: |
| DIB1pA response to test signal versus QET bias | ||||
|---|---|---|---|---|
| Driver gain = x8, Test signal = 12 mVpp, 400 Hz | ||||
| QET bias [μA] | Vout [mVpp] | dIb/dIs | Rtes[mΩ] | notes |
| 400 | 48 | 5.2 | 74.2 | |
| 350 | 46 | 5.4 | 78.7 | |
| 300 | 45 | 5.5 | 81.1 | |
| 250 | 45 | 5.5 | 81.1 | |
| 230 | 43 | 5.8 | 86.2 | pulses |
| 220 | 38 | 6.5 | 101.4 | pulses |
| 210 | 20 | 12.4 | 219.2 | pulses |
| 205 | -8 | -31.1 | 650.8 | pulses |
| 200 | -39 | -6.4 | 156.9 | pulses |
| 195 | -95 | -2.6 | 81.7 | pulses, some 10kHz oscillations |
| 190 | -159 | -1.6 | 60.7 | pulses, some 10kHz oscillations |
| 185 | -195 | -1.3 | 54.9 | pulses, some 10kHz oscillations |
| 180 | -253 | -1 | 49.1 | pulses |
| 175 | 155 | 1.6 | 2.7 | |
| 170 | 156 | 1.6 | 2.5 | |
| 160 | 157 | 1.6 | 2.2 | |
| 150 | 159 | 1.6 | 1.9 | |
| 100 | 153 | 1.6 | 3.1 | |
| 50 | 162 | 1.5 | 1.3 | |
| 0 | 169 | 1.5 | 0 | |
| Rparasitic = 9.42 mΩ | ||||
| Negative values denote that output was inverted wrt test signal | ||||
The Rtes values above are calculated using the methods on this page about calculating TES resistance from AC response.
| 1045 | Apply test signal to DIB1pB then step down QET bias. At 240 μA pulses are first seen. At 210 μA the phase inversion occurs. At 190 μA some 10kHz oscillations are seen. At 180 μA it falls into superconducting. |
|---|---|
| 1100 | Apply test signal to DIB1pC then step down QET bias. At 230 μA pulses are first seen. At 200 μA the phase inversion occurs. At 190 μA some 10kHz oscillations are seen. At 170 μA it falls into superconducting. |
| 1120 | The test signal for DIB3's DCRC (DCRC33) doesn't seem to be working. We had that problem earlier too. |
| Apply test signal to DIB4pB and try a few QET biases. At 400 μA the peak-to-peak output is higher than expected for normal-state, and it's not much different at 0 μA. It's difficult to drive this one normal - at one point we set it to 1000 μA to do it. | |
| Apply test signal to DIB4pB then step down QET bias. At 250 μA pulses are first seen. At 225 μA the phase inversion occurs. At 215 μA some 10kHz oscillations are seen. At 200 μA it falls into superconducting. | |
| 1125 | Apply test signal to DIB4pC then step down QET bias. At 220 μA pulses are first seen. At 190 μA the phase inversion occurs. At 180 μA some 10kHz oscillations are seen. At 150 μA it falls into superconducting. |
| 1320 | Take mini-IbIs data on DIB1pA to compare with the test signal data above. At a bias of 205 μA the TES resistance is nearly 90% of the total resistance. But this seems to be a good setting to minimize TES noise. |
| 1345 | Measure rate by taking 10 single triggers at 50ms traces and count the pulses. We count 43 pulses in 0.5s, so an average of 86Hz. |
| 1355 | In an attempt to find a QET Bias for DIB3 pB set QET bias to -400μA then step down QET bias. At -200 μA pulses are first seen. At -180 μA some 10kHz oscillations are seen. Set QET Bias to -190 μA. |
| 1355 | For DIB3 pC set QET bias to -400μA then step down QET bias. At -220 μA pulses are first seen. At -180 μA some 10kHz oscillations are seen. Set QET Bias to -190 μA. |
| Now all channels have QET biases set: |
| Channel | TES | QET Bias |
|---|---|---|
| DIB1 pA | 4 | 200 |
| DIB1 pB | 3 | 210 |
| DIB1 pC | 2 | 200 |
| DIB1 pD | 9 | 220 |
| DIB3 pB | 11 | -200 |
| DIB3 pC | 5 | |
| DIB4 pB | 8 | 225 |
| DIB4 pC | 1 | 190 |
| DIB4 pD | 0 | |
| 1425 | With the QET biases chronicled, inspect the modulation curves of all the phonon lines to see if SQUID settings need to be modified. |
|---|---|
| 1450 | Only DIBs 1 & 4 were able to be inspected since DIB3 won't send test signals. Almost all of the channels inspected required changes to their SQUID biases or Lockpoints, though these were generally small, with the exception of DIB4 pC, which previously had a SQUID bias of ~-70uA, but when adjusted now has a SQUID bias of -48uA. The new values are chronicled below: |
| Channel | SQUID Bias (uA) | Lockpoint (mV) |
|---|---|---|
| DIB1 pA | -76.5 | -3.1 |
| DIB1 pB | -81.2 | -3.72 |
| DIB1 pC | -70 | -3.5 |
| DIB1 pD | -82.6 | -1.8 |
| DIB4 pB | -83.2 | -3.06 |
| DIB4 pC | -48 | -0.9 |
| DIB4 pD | -51.3 | -4.7 |
| After setting these new values, the Driver Offsets needed to be adjusted so that the baselines of the channels were ~0V. | |
| 1512 | Set up trigger on inner channel on Side 1 (TES 0), DIB4 pD. Adjust timing link to make DCRC3 the master. |
| 1528 | Set DIB4 pD trigger threshold to 50 ADC bins based on how the pulses in the GUI look. This threshold looks like a good balance of mostly peaks with a noise trace every once in a while. |
| 1530 | Attempting to set the flash duration in Flash & Take to a very small number causes the fridge temperature to reach ~250mK regardless. So that's dumb. I'll just write my own sequencer script. |
| 1540 | Sequencer script is ready to deploy. It will just take 15 hour long data series without flashing or anything in between. |
| 1541 | Fill LN2 cold trap full. |
| 1541 | Start 15 one-hour data series of 0V data with Frontend Gain = 5/2/5, OG = 8/3/8, with 1000 beginning and ending randoms, with no flashing in between series, and a 50ADC bin threshold trigger on DIB4 pD. |
| 1549 | Stop data after looking at some of the traces. DIB4 pD is saturating a lot, and there seem to be too many noise pulses (i.e. the trigger threshold is too low). |
| 1605 | Open 1K Pot needle valve 1/16th of a turn to increase the 1K Pot pressure. |
| 1625 | After adjusting driver offsets and QET biases (as noted in the above table), we are ready to take more data. |
| 1630 | Start 15 one-hour data series of 0V data with Frontend Gain = 5/2/5, OG = 8/3/8, with 1000 beginning and ending randoms, with no flashing in between series, and a 50ADC bin threshold trigger on DIB4 pD. |
| 1810 | Looks like somehow we lost the timing link. Terminate the sequence. Reset timing link in telnet session with DCRC55 as master. |
|---|---|
| 1814 | Turn off randoms and manually take a little data. Timing link still appears broken. |
| 1820 | In ODB, all 3 DCRCs are set to DCRC*/General/MasterSlaveFree=0 (Free running) Try changing these to DCRC 1/2/3=1/2/2=master/slave/slave in the ODB and take some more test data. Looks like we're back in business! Events in BatViewer seem synchronized again. |
| 1825 | Start 15 one-hour data series of 0V data with Frontend Gain = 5/2/5, OG = 8/3/8, with 1000 beginning |
| 1828 | A quick check of the post-random events indicates we've still got the timing link. |