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2016/08/08 (Monday)

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Setup: iZIP mode, DIB1/2/3 → cables → 3.2 MHz filters → DCRC55(1)/33(2)/50(3), Tower has been cooled below Al transition with mu-metal shield at standard position
DCRCs powered overnight. Pumping on IVC with turbo pump overnight.
0851 Fill LN2 Cold trap full.
Tower/MC/Coldplate = 38/47/154 mK, Still = 1.30 K / 50 μbar, G1/G2 = 154/140 mbar, 1K Pot = 1.43 K / 1.8 mbar, MB = 68.9%. Tweak 1K Pot.
Boiloff rate: good. Yesterday's pressure releases at 5min and 55min worked OK.
0930 Disconnect DCRCs to do another electrical check at the breakout box. On DIB1 got “defaults” for qInner and qOuter Bias→Drain (20 nS), Bias→Source (20 nS), Drain→Bias (<1 nS), Source→Bias (<1 nS), Feedback→Bias (<1 nS), Chassis→all(<1 nS). For DIB2, all are ok except qInner Feedback→Chassis is 26 nS. This short is probably what's causing the problem with the qInner channel.
1030 Repower DCRCs, zap twice, look at phonon channels. DIB3 channels require extreme driver offsets which is strange. DIB1 pA has some scratchy noise and low amplitude pulses. Repower these two DCRCs.
1150 Still trying to get the channels to look right. Noise on DIB3 pC so tried modifying the SQUID tuning: was SQUID bias[μA]/lockpoint[mV] = -80.3/-2.47, changed to -66.0/-13.9. Then there was squiggly noise in the phonon channels, and on DCRC1 for some reason there were no charge traces (they seemed to be railed). Repower DCRCs again.
1218 Started programs and zapped squids before setting up timing link
1345 DIB1 charge both railed at 7V. Realised that we have DCRCs 50 and 55 swapped, this is certainly the source of much of our woe today. Powering them down and connecting properly with DIB1/2/3 → cables → 3.2 MHz filters → DCRC55(1)/33(2)/50(3)
Also corrected a few ODB settings by comparing to previous ODB files. We set: DCRC*/General/ChargePrepulseSamples=500, DCRC*/General/PhononPrepulseSamples=500, Logger/Write as CDMS series=y, Triggerfe2/Common/Period=200
1355 Zapping squids
1405 Reapplied phonon settings that were used on 2016 July 27 12:40. That's the last good data that was taken.
1441 All channels look good except DIB2 QI, which has a known short (see 0930 above)
1645 Perform mini-IbIs on all phonon channels to see how close we are to target R_tes_biased of 200 mΩ. Adjusted several QET biases to get closer to target.
Before (if changed) After adjustment
Channel QET bias (μA) R_tes (Ω) QET bias (μA) R_tes (Ω)
DIB 1 pA 114.2 0.207
DIB 1 pB 127.1 0.195
DIB 1 pC 117.8 0.209
DIB 1 pD 100.8 0.161 110 0.200
DIB 2 pA -112.6 0.186 -116 0.200
DIB 2 pB -112.6 0.219 -110 0.209
DIB 2 pC -138.8 0.244 -125 0.195
DIB 2 pD -97.7 0.197
DIB 3 pA 110 0.328 85 0.197
DIB 3 pB 100.7 0.178 107 0.206
DIB 3 pC 92.5 0.269 86 0.198
DIB 3 pD 119.2 0.158 130 0.196
1700 Adjust driver offsets to get all phonon baselines around -0.7 V
1705 Fill LN2 cold trap bath
1710 Tower = 39.5 mK, 1K Pot = 1.48 K / 3.2 mbar, oscillating a bit (2.5-5 mbar, 1.46-1.52 K).
1712 Start 8 hours of 30min background series at -4/+4 V with FG=5/2/5, OG=8/3/8, with 1000 initial randoms, 1000 ending randoms, with 30s 6s flash and 2520 minute cooldown between series. Trigger on DIB1 phA with threshold of 30ADC bins, with 150 us pileup cut window. (20 minute cooldown is a mistake, this I guess was the default on the flash-and-take on the DCRC control page. Also 6s is a mistake, normally do 30s.)
1715 Tower only heated to 140 mK during flash, that's kind of unusual. I guess because the flash was set too short.

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