| | Setup: iZIP mode, DIB1/2/3 → cables → 3.2 MHz filters → DCRC55/33/50 | |
| | Took some Ba series overnight | |
| 0855 | Remove Ba source from fridge | |
| 0900 | Tower = 31.0 mK, Still = 0.095 mbar, G1/G2 = 180/180 mbar, 1K Pot = 1.57 K / 4.0 mbar, Main bath = 67.0% | |
| 0905 | Fill LN2 cold trap full. | |
| 1120 | Set pB/pD channels on DIB1 & DIB3 and pA/pC on DIB2 to opposite values of their QET biases (i.e. negative for DIBs 1&3, positive for DIB2). Adjust Driver Offsets to unrail channels. Everything looks good. | |
| 1125 | Start one 30min background series at -4/+4 V with alternating signs for QET biases with FG=5/2/5, OG=3, with 1000 initial randoms, 1000 ending randoms, with 30s flash and 25 minute cooldown before series. Trigger on DIB1 phA with threshold of 30ADC bins, with 150 us pileup cut window. | |
| 1229 | Start one 30min background series at -4/+4 V with alternating signs for QET biases with FG=5/2/5, OG=3, with 1000 initial randoms, 1000 ending randoms, with 30s flash and 25 minute cooldown before series. Trigger on DIB1 phA with threshold of 30ADC bins, with 150 us pileup cut window. | |
| 1420 | Switch all QET biases back to regular values. | |
| 1425 | Perform mini IbIs in standard setup. | |
| 1505 | Adjust trace lengths to be 8 MIDASBins (4 real-life bins) longer than usual (i.e Charge Trace Length set to 16392 and Phonon Trace Length set to 8200 MIDASBins in ODB). Turn on Test Signals. Conduct some random tests to observe if position of continuity error in prepulse (talk to Nick) changes. It doesn't. Back to standard trace lengths. | |
| 1616 | Stack DCRCs (and DSUB pi-filters) in a vertical stack with cardboard between (to prevent grounding issues). Commence mini IbIs test. | |
| 1635 | Power off DCRCs, detach DSUB pi-filter. Remove additional aluminum shielding from pi-filter switchboards. Check that all switches are still ON and attach to back of DCRCs (usual spot). DCRCs still stacked vertically. | |
| 1653 | Repower DCRCs. Zap SQUIDs. | |
| 1700 | Perform mini IbIs with pi-filter switchboards attached to stacked DCRCs with all switches ON. | |
| 1720 | Unpower DCRCs. Remove pi-filter boards, attach DSUB pi-filters, unstack DCRCs. | |
| 1725 | Repower DCRCs. Zap SQUIDs. | |
| | Fill LN2 cold trap full. | |
| 1740 | Set pB/pD channels on DIB1 & DIB3 and pA/pC on DIB2 to opposite values of their QET biases (i.e. negative for DIBs 1&3, positive for DIB2). Adjust Driver Offsets to unrail channels. Everything looks good. | |
| 1745 | Start 14 30min Ba series at -4/+4 V with alternating signs for QET biases with FG=5/2/5, OG=3, with 1000 initial randoms, 1000 ending randoms, with 30s flash and 25 minute cooldown before series. Trigger on DIB1 phA with threshold of 30ADC bins, with 150 us pileup cut window. | |
| 1750 | Place Ba source at back of fridge near where top of shield would be. | |