2021/03/23 (Tuesday)
- Lab in-person: Matt
- Virtual partner: Ruiren
| Status | Run 74 in progress. Cooling the fridge after a partial warmup intended to pump out He, hoping to fix the short in q4. |
|---|---|
| Setup: DIB1/2+acc → SL 41/43 → 3.2 MHz filters → cables 2/3 → nothing/HV_diverter_board → DCRC50(3)/ |
|
| 0813 | MB = 68.3% |
| 0855 | Tower = 0.43 K. Condenser = 560 mbar. Still = 0.19 mbar. |
| I guess the Tower is still warm because I left DCRC3 powered. I turned off the 15V power yesterday but maybe something is still biased, maybe something happening to the SQUIDs… | |
| 0945 | Matt enters lab |
| 0950 | Power down DCRC3 and disconnect Cable 2 from it. |
| 0950 | Tower/MC/Coldplate = 0.43/0.47/0.59 K, Still = 1.32 K / 0.19 mbar / 0 mW, G1/G2 = 562/517 mbar, 1K Pot = 1.65 K / 28±2 mbar. |
| 1015 | Tower temperature is not coming down much even though both DCRCs are disconnected. Interesting. |
| 1015 | Turn on Still Heater → 5 mW |
| 1220 | Tower = 0.39 K. Slowly cooling but still hot. Maybe something to do with having the DCRC powered earlier, something “stuck”. Or maybe there's a thermal touch that happened when I had Ruiren bump the fridge yesterday. |
| 1225 | Bump the fridge on both E and W sides. This causes a Tower temperature spike. 0.39→0.42 K, then cools again. |
| 1225 | Check the DIB2 qI Feedback short again. It's better now! Around 10 nS instead of 25 nS. Huh. Let's try firing up the DCRCs again. |
| 1245 | Spent some time troubleshooting the problem with DCRC55(1), that it often wouldn't turn on when plugged into the cable, which we had figured out was because the POE 50V power was shorting to the DCRC ground. I think a plate underneath the corner where the power plug is was shifting and causing a touch that caused the short. There's some pink packing material between this plate and the bottom plate, apparently put there in the past to hold the plate in place. But the plate was tilting the other way… I put another piece of white packing material on top of that plate, under the main PCB, and this seems to have fixed it.  |
| 1245 | Connect Cable 3 to HV diverter board to DCRC1, connect Cable 2 to DCRC2, turn on both DCRCs. |
| 1250 | Start DAQ programs (as usual I had to disable and reenable the two DCRCs a few times) |
| 1255 | Check noise - DCRC1qI (q4) is much improved. But noise in all channels is relatively high - maybe because of the elevated temperature. |
| 1255 | Noise in DCRC3qI/qO/DCRC1qI/qO = 60/5.6/195/14 e-6 @ 10 kHz |
| 1300 | Squeeze the connections together more tightly on both DCRCs. This seems to improve the noise significantly, better than a factor of 2. Noise in DCRC3qI/qO/DCRC1qI/qO = 25/2.9/71/5 e-6 @ 10 kHz |
| Let's try some +11V data, see how it looks. I remember before choosing thresholds 6 times the noise at 10kHz. So let's try 400 for all channels. | |
| 1311 | Start 31min series of +11V data (bias applied after 1 min), with 1000 beginning randoms, trigger threshold 400/400/400/400 on DCRC3qI/qO/DCRC1qI/qO, no in-run randoms, with 1.6384 ms pulses (8192 length) and 400 us prepulse (500 length). Use sequence r74_takeandflash_dcrcbias.msl |
| Getting some triggers in the right place but also seeing trigger bursts… | |
| 1315 | Fill LN2 cold trap bath |
| 1320 | Messing with triggers a bit, increased DCRC1qI thresh to 500. And I found that DCRC3 channels are causing trigger bursts so I disabled triggering on those two channels. |
| Plot from the data looks pretty bad. If the 60keV line is actually there it's really smeared out. And later in the series after adjusting the trigger threshold it looks like the threshold is too high, just above the 60 keV peak. | |
| 1335 | Matt exits lab |
| 1510 | Tower = 0.41 K, pretty bad. |
| 1710 | Tower = 0.40 K, cooling very slowly. Zap SQUIDs, for fun. |