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2019/07/15 (Monday)

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Setup DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer ?/3/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC55(1)
DCRC33(2) → 1kV power supply → HV input

Three walls of the lead/poly shield are up.
0847 Tower/MC/Coldplate = 38.4/29.3/197 mK, Still = 1.35 K / 0.18 mbar / 6 mW, G1/G2 = 199.7/193.1 mbar, 1K Pot = 1.613 K / 19 mbar. MB = 72.5%
1440 Fill LN2 cold trap bath.
1500 DCRC1 PC was railed, reset squid (set to open and then back to non-inverted). Baseline is high, readjust driver offset to 0.063
1520 Adjust trigger settings, to try to lower the effective threshold. We had been running at baseline/sample length of 20/16 and thresh = 3 (on pF). Adjusting sample length down to 13 seems to increase the triggering rate so that we occasionally see pulseless traces. Maybe this is a low enough trigger to start to see the 160 eV line.
1533 Start a sequence of “8” @ 50 min series at HV = 180→306V, rate 2.49V/min, with 10% prebias for 2 minutes, flash at end with 30 min wait.
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/495)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR, 5Hz InRun randoms, trigger on DCRC1pD threshold = 3, baseline/sample length = 20/13 (standard 16/5),phonon pre-pulse 500 (standard is 500).
Use sequence HVdrift_8X180V_2p49VPM_loopversion_prebias_10_2_dur_50min_flashDCRC_1_4.msl
we'll just do one series as a test then stop the sequence, so that we can do overnight activation.
1650 Begin overnight activation using PuBe source. End previously started run.

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