2019/06/10 (Monday)
| Setup | DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer ?/3/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC55(1) DCRC33(2) → 1kV power supply → HV input Two walls of the lead/poly shield are up. |
|---|---|
| 0845 | Tower/MC/Coldplate = 43.1/30.9/178 mK, Still = 1.02 K / 0.090 mbar, G1/G2 = 160/143 mbar, 1K Pot = 1.64 K / 24 mbar. MB = 37.3% |
| 0850 | Fill LN2 Cold trap bath |
| Let's look at QET bias settings. We'll start a series to take the HV up to 200 V with the standard 014drift to 400 V, but we won't write data. That will give us over an hour at bias to look at the QET settings. | |
| 1345 | Start the sequence HVdrift_200V_2p64VPM_prebias_10_2_dur_75min_flashDCRC_1_4.msl, then turn off Write data, in preparation for QET bias adjustments and IbIs |
| Channel | I_B (uA) | Vout (V) | log10(oscillations) |
|---|---|---|---|
| DCRC1 PB | 410 | -0.969 | |
| 420 | -967 | ||
| 430 | -0.962 | ||
| DCRC1 PC | 390 | -1.0 | |
| 400 | -0.926 | ||
| 410 | -0.861 | ||
| 450 | -5.16 | ||
| 470 | -5.20 | ||
| 475 | -0.571 | ||
| 480 | -0.556 | ||
| 485 | -0.545 | ||
| DCRC1 PD | 440 | -0.957 | |
| 450 | -0.894 | ||
| 460 | -0.837 | ||
| 480 | -2.83 | ||
| 490 | -2.50 | ||
| 500 | |||
| 510 | Noise is nasty, 80 kHz at -4.1 (oscil) | ||
| DCRC4 PA | 410 | -0.988 | |
| 420 | -0.909 | ||
| 430 | -0.847 | -5.3 | |
| 440 | -4.8 | ||
| 450 | -4.1 | ||
| 460 | -4.1 | ||
| 480 | -0.595 | ||
| 490 | -0.560 | ||
| 500 | -0.537 | ||
| DCRC4 PB | 390 | -0.928 | |
| 400 | -0.971 | ||
| 410 | -0.894 | -5.1 | |
| DCRC4 PC | 430 | -1.01 | |
| 440 | -0.931 | ||
| 450 | -0.869 | -5.1 | |
| 470 | -2.6 | ||
| 480 | -3.0 | ||
| 485 | 0.974 | -4.74 | |
| 490 | 0.992 | -5.25 | |
| 495 | 1.01 | -5.7 |
- The inner ring channels (DCRC1pC/4pA/4pC) have the worst problems with oscillations. The center channel (DCRC1pD) has some problems, and the outer rings have very little.
- The recent QET biases were set below the oscillation regime. We can try setting them above and see if there's an improvement.
| channel | old QET bias | new QET bias |
|---|---|---|
| DCRC4pA | 420 | 490 |
| DCRC4pB | 400 | 400 |
| DCRC4pC | 440 | 490 |
| DCRC1pB | 420 | 420 |
| DCRC1pC | 400 | 480 |
| DCRC1pD | 450 | 450 |
| 1535 | Commence LHe transfer. MB=28.0% |
|---|---|
| 1620 | Cease LHe transfer. MB=93.3% |
| 1650 | Fill LN2 cold trap full. |
| 1653 | Start a 75 min series at HV = 200→400V, rate +2.64V/min with 10% prebias for 2 minutes, flash at end with 30 min wait. CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR and 1000 EOR randoms, trigger on DCRC1pB/C/D threshold = 6/6/6. Use sequence HVdrift_200V_2p64VPM_prebias_10_2_dur_75min_flashDCRC_1_4.msl |
| 1937 | Start a 75 min series at HV = 200→400V, rate +2.64V/min with 10% prebias for 2 minutes, flash at end with 30 min wait. CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR and 1000 EOR randoms, trigger on DCRC1pB/C/D threshold = 6/6/6. Use sequence HVdrift_200V_2p64VPM_prebias_10_2_dur_75min_flashDCRC_1_4.msl |
| 2200 | Start a 75 min series at HV = 200→400V, rate +2.64V/min with 10% prebias for 2 minutes, flash at end with 30 min wait. CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/490)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR and 1000 EOR randoms, trigger on DCRC1pB/C/D threshold = 6/6/6. Use sequence HVdrift_200V_2p64VPM_prebias_10_2_dur_75min_flashDCRC_1_4.msl |
| All data above is bad, I neglected to turn on triggering and left random rate on at 10 Hz. |