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2019/04/05 (Friday)

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Setup DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer 3/?/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC50(3)
DCRC33(2) → 1kV power supply → HV input


Lead poly shield is erected, N/E/W walls complete, no poly or lead on S wall.
Overnight Base temp has been a little unstable since 0500, with an average low of 39.3 mK, but short excursions as high as 40.8 mK.
Ran a sequence until 2AM, still no MIDAS crashes since cdms2 rebuild.
0930 Tower/MC/Coldplate = 39.5/29.7/187 mK, Still = 1.71±0.15 K / 0.150 mbar, G1/G2 = 292/269 mbar, 1K Pot = 1.77 K / 13 mbar. MB = 35.5%
0938 Fill LN2 cold trap full.
1030 Swap HV polarity.
1030 Start 4x background series at HV = -300→-400V @ 2.42 V/min (40 min duration) with 1 minute 15% prebias
CDMS detector: Driver Gains = 1x, DCRC4/3 QET biases = (440/380/430)/(500/460/410) uA, Front-End Gains = (2/2/3)/(5/2/5)
1000 BOR randoms, trigger on DCRC4pA/B/C threshold = 6/6/6 DCRC4pA threshold = 6
use sequence HVdrift_4x300V_2p42VPM_prebias_15_1_dur_40min.msl
1115 Later: Noticed that Vleak suddenly went from -11 mV to -0.68 V!
1150 Tower base has slowly risen to 41.5 mK. Might have a channel in a bad state.
1155 Stop series after flash.
1200 DCRC4 pA is okay, DCRC4 pB is ringing bad, DCRC4 pC is okay after a snap. DCRC3 pC is showing weird, inverted pulses.
Looking at last series, things were good until sometime in minute 36 when DCRC4 pB started ringing and DCRC3 pC started looking like this.
1205 Turn QET biases down to 0, then snap, then return to normal settings. DCRC4 pB still ringing and DCRC3 pC still inverted. Tower temp is slowly coning down though, at 40.6 mK now.
1215 Try to find a good setting for DCRC4 pB, it seems to ring all the way down to SC. But if we go higher, to 410, we get inverted pulses on this channel too! What's going on?
1217 Set QET biases to 0 and zap SQUIDs.
1305 Tower = 39.3 mK
1310 Snap all channels. Start putting them back into transition. All channels back in transition and no oscillations. Let's try to take biased data again.
1317 Start 4x background series at HV = -300→-400V @ 2.42 V/min (40 min duration) with 1 minute 15% prebias
CDMS detector: Driver Gains = 1x, DCRC4/3 QET biases = (440/380/430)/(500/460/410) uA, Front-End Gains = (2/2/3)/(5/2/5)
1000 BOR randoms, trigger on DCRC4pA/B/C threshold = 6/6/6
use sequence HVdrift_4x300V_2p42VPM_prebias_15_1_dur_40min.msl
1330 Gah, DCRC3 pD is SC. Try to snap and restore it as the data is taking. Can't seem to get it back easily. This data is garbage.
Stop logging
Doesn't help that DCRC_UI is really laggy.
1340 Still struggling to rein in DCRC3 pD. There is very little room below the oscillations and SC. Can run above the oscillations at ~500uA.
1345 HV drift is still going on. Starting to see wierd pulse shapes in DCRC3 pC,pD as before. No ringing in any channels though.
1405 Stop sequence at -400 V and turn down HV using HVchange_400_to_0.msl

I'm worried that we're slowly killing one of our SQUETs or striplines with HV. Here is the current mapping and status based on SQUID tests and channel behavior. The one stripline/SQUET (and sidecoax/DIB) that is getting HV is the one which is having issues.

HV side 2, Readout Side 1 Map
DIB channel Detector channel SQUET Stripline DCRC channel Status
DIB1 PA S1 PE ZC-68 43 DCRC4 PA Okay
DIB1 PB S1 PB ZC-68 43 DCRC4 PB Okay
DIB1 PC S1 PD ZC-68 43 DCRC4 PC Okay
DIB3 PC S1 PA ZC-23 41 DCRC3 PB SQUID okay, TES bad
DIB4 PA - ZC-24 48 HV -
DIB4 PC S1 PC ZC-24 48 DCRC3 PC SQUID bad, TES ?
DIB4 PD S1 PF ZC-24 48 DCRC3 PD SQUID okay, TES ?
1426 Flash detector

Aside: During the flash we see pulses like this with very uniform amplitude. Maybe some crosstalk at the start then phonon pulse? There has been talk about using such things for calibration.

Phonon signal during flash
1440 Commence LHe transfer, MB=27.7%
1452 Let's do a quick electrical check of DIB4 during the transfer.
Turn off DCRC programs and power down DCRCs 3,4.
1510 Observations: DIB4 pA SQUID/ret and FB/ret are open. We HV bias these along with DIB4 pA QET lines. Hopefully we didn't damage them.
No shorts from DIB4 pA lines to DIB4 pC, pD lines. Might expect to see a short there if the HV is leaking to the grounded channels, but no smoking gun here.
Measuring a single LED with meter in diode mode for 2 seconds heats fridge to 170 mK. Maybe we need to set the LED currents higher in the DCRCs for some reason?
Also checked HV1 port connections to HV bias on HV board, but no obvious shorts.
1530 Cease LHe transfer, MB=88.0%
1558 Put everything back together, power up DCRCs.
1600 Zap SQUIDs.
1614 After Zap tower temp started to fall to 42.5 mK, then rose to 43.9 mK.
Set all QET biases = 0, toggle 15V power ON/OFF.
1620 Tower temp = 43.6 mK and slowly decreasing
1638 Tower = 10.4 mK and slowly cooling.
Get all channels into transition and looking good.
1645 Flash detector.
1646 Fill LN2 cold trap full.
1650 Set HV polarity to positive.
1651 Tower = 40.0 mK and cooling.
1657 Start 6x background series at HV = 300→400V @ 2.42 V/min (41 min duration) with 1 minute 15% prebias
CDMS detector: Driver Gains = 1x, DCRC4/3 QET biases = (440/380/430)/(500/460/410) uA, Front-End Gains = (2/2/3)/(5/2/5)
1000 BOR randoms, trigger on DCRC4pA/B/C threshold = 6/6/6
use sequence HVdrift_6x300V_2p42VPM_prebias_15_1_dur_41min.msl
1707 Accidentally start a run for a few seconds and write data.
1710 Real series starts. Pulses look fine so far. Hopefully they stay that way.
1712 HV=306.6V, but Vleak = 0.526 Grrrr! Hadn't been watching this today, and now I see that it was going this high since 1115 today.
This is like a 200V drop!
1719 Stop the sequence and the run. Turn down HV manually.
1724 Start 6x background series at HV = 0V, 60 min duration
CDMS detector: Driver Gains = 1x, DCRC4/3 QET biases = (440/380/430)/(500/460/410) uA, Front-End Gains = (2/2/3)/(5/2/5)
1000 BOR randoms, trigger on DCRC4pA/B/C threshold = 6/6/6
use sequence SimpleDataLoopNoFlash.msl
Calibrated spectrum with and without crude Pinner cut
Uncalibrated randoms Calibrated randoms

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