| | Setup: DIB1/2 → SL 43/41 → 3.2 MHz filters → cables 3/1 → DCRC50(3)/55(1). |
| 0900 | Tower/MC/Coldplate = 37.4/31.0/187 mK, Still = 1.45 K / 0.130 mbar, G1/G2 = 156/143 mbar, 1K Pot = 1.62 K / 26 mbar. Main bath = 30.5% |
| 0905 | Fill LN2 cold trap bath. |
| 1004 | Start sequence of 4, 30 min series of +6V DCRC bias using takeNoflash_R67.msl, with no flash, but ground and wait 30 min between series , 1000 beginning randoms, and a 50/40/60/40 bin threshold trigger on DCRC1qI/qO/DCRC3qI/qO, with 1.6384 ms pulses (8192 length) and 400 us prepulse (500 length). |
| 1237 | Start LHe transfer (MB = 24.4%) |
| 1339 | End LHe transfer (MB = 72.6%) Dewar ran empty. |
| 1442 | Start 60 min series of +6V DCRC bias with 5 min +12V prebias using flashandtake_wPrebias_R67.msl, with 30s flash, 30 min cooldown before series , 1000 beginning randoms, and a 50/40/60/40 bin threshold trigger on DCRC1qI/qO/DCRC3qI/qO, with 1.6384 ms pulses (8192 length) and 400 us prepulse (500 length). Note, data taking includes 5min prebias time All noise triggers [image not archived: doubt2.svg] |
| 1659 | Fill LN2 cold trap full. |
| 1709 | Start bias scan sequence of 60 min series , with DCRC bias = (5,6,7,8,9,10,11,12), with 30s flash, 30min cooldown, 1000 beginning randoms, and a 50/40/60/40 bin threshold trigger on DCRC1qI/qO/DCRC3qI/qO, with 1.6384 ms pulses (8192 length) and 400 us prepulse (500 length). |