| | Setup: DIB1/2 → SL 43/41 → 3.2 MHz filters → cables 3/1 → DCRC50(3)/55(1). |
| | Overnight bias-sweep data. Last flash occurred around 5:30. Tower rises to 380 mK during flash. |
| 1036 | Start sequence of 4, 30 min series of +6V DCRC bias data using flashandtake_R67.msl, with 30s flash, 30min cooldown, 1000 beginning randoms, and a 50/40/60/40 bin threshold trigger on DCRC1qI/qO/DCRC3qI/qO, with 1.6384 ms pulses (8192 length) and 400 us prepulse (500 length). |
| 1432 | Fill LN2 cold trap full. |
| 1433 | Tower/MC/Coldplate = 39.8/32.5/184 mK, Still = 1.43 K / 0.120 mbar, G1/G2 = 136/123 mbar, 1K Pot = 1.63 K / 30 mbar. Main bath = 20.8% |
| 1440 | Start LHe transfer (MB = 20.5%) |
| 1545 | End LHe transfer (MB = 88.1%) |