| | Setup: DIB1/3/4 → SL 27/19/20 → 3.2 MHz filters → cables 2,1,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3). DCRC4 → HV power supply. |
| 1000 | Tower/MC/Coldplate = 21.8/25.6/153 mK, Still = 1.6 K / 0.100 mbar, G1/G2 = 232/209 mbar, 1K Pot = 1.63 K / 28 mbar, MB = 67.8% |
| 1015 | Fill LN2 cold trap bath |
| 1655 | Fill LN2 cold trap bath |
| 1715 | Start sequence of 12 30-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pC threshold = 12, flashing then waiting 30min after each series, using modified triggerfe, using sequencer script DataLoop_70V_30min_groundflash_30min |
| | first series started at 1728, then 1843, then 1959… 30 min of data in ~ 75 min full cycle |
| 1730 | HV = 69.89 V, V_leak = 3.16 mV |
| 2025 | HV = 69.89 V, V_leak = 2.45 mV |
| 2025 | Tower = 21.7 mK |