2017/12/20 (Wednesday)
| Setup: DIB1/3/4 → SL 27/19/20 → 3.2 MHz filters → cables 2,1,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3). DCRC4 → HV power supply. | |
| 0928 | Tower/MC/Coldplate = 50.9/52.9/151 mK, MC heater = 8.0 μW, Still = 1.3 K / 0.110 mbar, G1/G2 = 244/218 mbar, 1K Pot = 1.62 K / 28 mbar, MB = 70.4% |
| 0932 | Fill LN2 cold trap full. |
| 0939 | Turn off MC heater. |
| 1010 | Tower = 22.4 mK and settling. |
| 1012 | Restore low temperature QET biases = 480/360/440/480/380/490 uA |
| 1032 | Bring PuBe source into lab and place behind lead wall in its paraffin-filled drum |
| 1200 | Write and compile a modified trigger front end called triggerfe2_mod.exe. This version has a pileup rejection that keeps the first event in a pileup and rejects the second (rather than rejecting both). Should be able to start it with command /home/hep/cdmssoft/scdmsDAQ/MidasDAQ/online/src/RevC/triggerfe2.exe -D. But need to stop the other triggerfe first. |
| 1200 | Tower = 21.4 mK and flat |
| we'll try a standard test series, then try another one with the modified trigger front end | |
| 1203 | Start 16-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pD (Side1pF) threshold = 14. Also in-run randoms at 20Hz (by mistake) |
| 1206 | Adjust DCRC3pB D.O. from 0.1 to -0.3. It's railed low. |
| 1216 | Adjust DCRC1pC D.O. from -1.0 to -0.9 Adjust DCRC3pB D.O. from -0.3 to -0.2 Adjust DCRC3pD D.O. from 0.5 to 0.4 |
| 1220 | Stop data. Turn off triggerfe2 from MIDAS page. Start triggerfe2_mod.exe from command line |
| 1223 | Start 8-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pD (Side1pF) threshold = 14, also in-run randoms at 20Hz (by mistake), using modified triggerfe |
| Data taking seems to be working - successfully using modified triggerfe | |
| 1231 | Stop data and kill triggerfe2_mod.exe from command line |
| 1353 | Remove PuBe source from lab and return to PAN 443 storage |
| 1517 | Tower = 21.5 mK |
| 1518 | Set DCRC1,3 trace lengths to 13.1072 ms (phononwaveformlength=32768 ) |
| 1522 | Start 5 min long trace randoms transition data series at HV=0V, Driver Gains = 2x, QET biases = (480/360/440)/(480/380/490) uA, Front-End Gains = 10/5 on DCRC1/3, DCRC1,3 trace length = 13.1072ms, Trigger on 20Hz randoms |
| 1528 | Dial HV up to 70 V with 15% 5-minute prebias, using changeHV_0_70_preBias15_5.msl |
| 1536 | Sequence ends. HV = 69.84 V, V_leak = -10 mV |
| 1540 | HV = 69.84 V, V_leak = 3.48 mV |
| 1541 | Start 5 min long trace randoms transition data series at HV=70V, Driver Gains = 2x, QET biases = (480/360/440)/(480/380/490) uA, Front-End Gains = 10/5 on DCRC1/3, DCRC1,3 trace length = 13.1072ms, Trigger on 20Hz randoms |
| 1546 | HV = 69.84 V, V_leak = 3.30 mV |
| 1548 | Dial down HV bias to 0V using changeHV_70_0.msl |
| 1550 | Stop dcrc programs and power down dcrcs 1,3 |
| 1553 | Insert DIB3 switchboard with all switches ON between DIB3 pi filter and ebox. |
| Setup: DIB1/3/4 → SL 27/19/20 → -/switchboard (all ON)/- → 3.2 MHz filters → cables 2,1,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3). DCRC4 → HV power supply. | |
| 1555 | Power on DCRCs 1,3, start dcrc programs. |
| 1557 | Re-lock DCRC1PB,PC and DCRC3PC,PD. Snap DCRC3PD. Adjust DCRC1PC D.O. from -0.85 → -1.75 and DCRC1PD D.O. from 0.42 → 0.12. |
| 1607 | Start 5 min long trace randoms transition data series at HV=0V, Driver Gains = 2x, QET biases = (480/360/440)/(480/380/490) uA, Front-End Gains = 10/5 on DCRC1/3, DCRC1,3 trace length = 13.1072ms, Trigger on 20Hz randoms, DIB3 switchboard @ ebox |
| 1613 | Dial HV up to 70 V with 15% 5-minute prebias, using changeHV_0_70_preBias15_5.msl |
| 1622 | Sequence ends. HV = 69.84 V, V_leak = -7 mV |
| 1626 | HV = 69.85 V, V_leak = 3.17 mV |
| 1627 | Start 5 min long trace randoms transition data series at HV=70V, Driver Gains = 2x, QET biases = (480/360/440)/(480/380/490) uA, Front-End Gains = 10/5 on DCRC1/3, DCRC1,3 trace length = 13.1072ms, Trigger on 20Hz randoms, DIB3 switchboard @ ebox |
| 1632 | HV = 69.84 V, V_leak = 3.10 mV |
| 1633 | Dial down HV bias to 0V using changeHV_70_0.msl |
| 1636 | Stop dcrc programs and power down dcrcs 1,3 |
| 1637 | Turn off DIB3PB(S2PA) switches on DIB3 switchboard to prevent HV board from biasing S2PA. Switch numbers are: 1-1, 1-2, 1-3, 1-5, 2-1, 8-1, 9-2, 9-5, 10-3 |
| Setup: DIB1/3/4 → SL 27/19/20 → -/switchboard (PB OFF)/- → 3.2 MHz filters → cables 2,1,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3). DCRC4 → HV power supply. | |
| 1639 | Power on DCRCs 1,3, start dcrc programs. |
| 1641 | Relock DCRC1PB, Adjust DCRC1PA D.O. 0.1 → 0.35 , DCRC1PB D.O. -0.5 → 0.0, DCRC3PB D.O. -0.15 → -0.45, DCRC3PC D.O. -0.35 → -1.1 |
| 1647 | Start 5 min long trace randoms transition data series at HV=0V, Driver Gains = 2x, QET biases = (480/360/440)/(480/380/490) uA, Front-End Gains = 10/5 on DCRC1/3, DCRC1,3 trace length = 13.1072ms, Trigger on 20Hz randoms, DIB3 switchboard @ ebox, S2PA floating |
| 1648 | Tower = 21.8 mK |
| 1653 | Dial HV up to 70 V with 15% 5-minute prebias, using changeHV_0_70_preBias15_5.msl |
| 1702 | Sequence ends. HV = 69.84 V, V_leak = -5 mV |
| 1706 | HV = 69.84 V, V_leak = 3.02 mV |
| 1707 | Start 5 min long trace randoms transition data series at HV=70V, Driver Gains = 2x, QET biases = (480/360/440)/(480/380/490) uA, Front-End Gains = 10/5 on DCRC1/3, DCRC1,3 trace length = 13.1072ms, Trigger on 20Hz randoms, DIB3 switchboard @ ebox, S2PA floating |
| 1713 | HV = 69.85 V, V_leak = 2.92 mV |
| 1714 | Dial down HV bias to 0V using changeHV_70_0.msl |
| 1636 | Stop dcrc programs and power down dcrcs 1,3 |
| 1722 | Set switchboards to HV bias only S2PA. DIB1: OFF 2-2, 3-1, 3-2, 4-1, 4-2, 4-3, 4-5, 6-4, 7-5, DIB3: all ON, DIB4 OFF 1-1, 1-2, 1-3, 1-5, 2-1, 8-1, 9-2, 9-5, 10-3 |
| Setup: DIB1/3/4 → SL 27/19/20 → switchboard(PD OFF)/switchboard(PB ON)/switchboard(PB OFF) → 3.2 MHz filters → cables 2,1,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3). DCRC4 → HV power supply. | |
| 1723 | Power on DCRCs 1,3, start dcrc programs. |
| 1725 | Relock DCRC1PB,PC Adjust DCRC1PA D.O. 0.35 → -0.15 , DCRC1PB D.O. 0.0 →-1.95 ,DCRC1PC D.O. -1.75 →-1.8 |
| 1730 | Start 5 min long trace randoms transition data series at HV=0V, Driver Gains = 2x, QET biases = (480/360/440)/(480/380/490) uA, Front-End Gains = 10/5 on DCRC1/3, DCRC1,3 trace length = 13.1072ms, Trigger on 20Hz randoms, switchboards @ ebox, S2PB,PC,PD,PE,PF floating |
| 1736 | Dial HV up to 70 V with 15% 5-minute prebias, using changeHV_0_70_preBias15_5.msl |
| 1745 | Sequence ends. HV = 69.87 V, V_leak = -5 mV |
| 1749 | HV = 69.87 V, V_leak = 3.00 mV |
| 1750 | Start 5 min long trace randoms transition data series at HV=70V, Driver Gains = 2x, QET biases = (480/360/440)/(480/380/490) uA, Front-End Gains = 10/5 on DCRC1/3, DCRC1,3 trace length = 13.1072ms, Trigger on 20Hz randoms, switchboards @ ebox, S2PB,PC,PD,PE,PF floating |
| 1755 | HV = 69.87 V, V_leak = 2.94 mV |
| 1756 | Dial down HV bias to 0V using changeHV_70_0.msl |
| 1757 | Fill LN2 cold trap |
| 1800 | Stop dcrc programs and power down dcrcs 1,3, Remove switchboards to return to standard config. |
| Setup: DIB1/3/4 → SL 27/19/20 → 3.2 MHz filters → cables 2,1,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3). DCRC4 → HV power supply. | |
| 1802 | Power on DCRCs 1,3, start dcrc programs. |
| 1803 | Traces still look fine, but may be worth zapping after all this. |