2017/12/11 (Monday)
| Setup: DIB1/3/4 → SL 27/19/20 → 3.2 MHz filters → cables 2,1,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3). DCRC4 → HV power supply. PuBe source present. | |
| 0935 | Tower/MC/Coldplate = 21.7/25.0/149 mK, Still = 1.3 K / 0.100 mbar, G1/G2 = 245/234 mbar, 1K Pot = 1.62 K / 26 mbar, MB = 46.4% |
| 0940 | Fill LN2 cold trap bath |
| 1020 | Dial HV up to 70 V with 15% 5-minute prebias, using changeHV_0_70_preBias15_5.msl |
| 1025 | Remove PuBe source from lab and move it to storage container in PAN 443 |
| 1045 | HV = 69.84 V, V_leak = 3.19 mV |
| 1047 | Adjust driver offset on DCRC3pB. |
| 1049 | Start 60-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pD (Side1pF) threshold = 14 |
| 1145 | HV = 69.85 V, V_leak = 2.73 mV |
| 1200 | Estimate event rate from random traces. Set PhononWaveformLength on DCRC1 to 131072 which is 52.4288 ms and counted visible pulses in 72 pA traces. Counted 114 pulses in 3.7745 seconds, so event rate is around 30.2 ± 2.8 Hz. |
| 1215 | Start LHe transfer (MB = 42.6%) |
| Let's do some tests of triggering on different channels. We did some this weekend but it was at 0V, let's redo them at 70V. | |
| 1224 | Start 15-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC1pA threshold = 20 |
| 1239 | Stop series |
| 1241 | Start 17-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC1pB threshold = 20 |
| This series stopped triggering after Dump 8. Is DCRC1pB railed? Yes, 3 channels are railed. | |
| 1305 | Adjust all Driver Offsets. All of them had shifted, some had railed. |
| 1305 | Stop LHe transfer @ MB = 89% |
| 1311 | Start 12-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC1pB threshold = 20 |
| 1324 | Start 10-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC1pC threshold = 20 |
| 1353 | Start 10-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pB threshold = 20 |
| 1404 | Start 15-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pC threshold = 20 |
| Luckily this seems to be triggering normally, unlike the weekend test where DCRC3pB needed a much higher threshold to keep from triggering constantly. | |
| 1420 | Start 13-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pD threshold = 20 |
| 1453 | Bring PuBe source into lab and place it within the cryostat poly shield, lowered into shield in plastic cup at NW corner down to about detector level. |
| noticeable increase in base temperature with source present in shield wow - after a few minutes it went up to 55 mK, though it's cooling down from that. |
|
| 1546 | Dial HV bias down to 0 V using changeHV_70_0.msl |
| Before bringing down the HV the Tower temperature was oscillating between 30 and 55 mK. After bringing the HV to 0 the Tower temperature fell back nearly to the level before the source was put in the shield, maybe 1/2 mK higher | |
| 1615 | Tower = 22.2 mK |
| 1615 | Flash detector with DCRC1,3 LEDs for 20 s |
| 1650 | Remove PuBe source from lab |
| 1650 | Raise HV to 70 V with 15% 5min prebias |
| 1700 | HV = 69.84 V, V_leak = 2.82 mV |
| 1705 | Estimate event rate from random traces. Set PhononWaveformLength on DCRC1 to 131072 which is 52.4288 ms and counted visible pulses in 18 pA traces. Counted 113 pulses in 0.9437 seconds, so event rate is around 119.8 ± 11.3 Hz. |
| 1710 | Adjust driver offset on DCRC3pB. Others were OK. |
| 1715 | Start sequence of 4 60-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pD (Side1pF) threshold = 14. Using new sequence SimpleDataLoopNoFlash.msl |
| 1720 | Tower = 21.5 mK |
| 1720 | HV = 69.84 V, V_leak = 2.68 mV |
| 1730 | Fill LN2 cold trap bath |
| 1840 | HV = 69.85 V, V_leak = 2.56 mV |
| 1930 | HV = 69.85 V, V_leak = 2.51 mV |
| 2030 | HV = 69.85 V, V_leak = 2.49 mV |
| 2120 | Dial HV down to 0 V |
| 2120 | Tower = 21.3 mK |
| 2120 | Flash detector for 30 seconds using DCRC1,3 LEDs. |
| 2200 | Tower = 22.0 mK |
| 2200 | Dial HV up to 70V with 15% 5-min prebias |
| 2210 | Tower = 21.6 mK |
| 2210 | HV = 69.87 V, V_leak = 2.35 mV |
| 2215 | Start sequence of |
| DCRC3pB stayed put through previous 4-hour sequence and it still looks good at the beginning of this sequence. Nice. | |
| 2222 | Stop sequence because I meant to do 7, not 4 series |
| 2223 | Start sequence of 7 60-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pD (Side1pF) threshold = 14. Using new sequence SimpleDataLoopNoFlash.msl |
| All channel baselines look good throughout sequence |