| | Setup: DIB1/3/4 → 3.2 MHz filters 3/1/2 → cable 3/1/2 →gender changer 3/1/2 → HVConn 1/3/2 → HV 1/2 → DCRC55/DCRC33 |
| | Detector is grounded and baked |
| 0830 | Tower/MC/Coldplate = 32.8/29.3/193 mK, Still = 1.25 K / 0.110 mbar, G1/G2 = 220/215 mbar, 1K Pot = 1.669 K / 22.0 mbar. Main Bath = 69.7%. |
| 0835 | Fill LN2 cold trap bath. |
| 0855 | Channels were in s/c overnight, and we seem to be in the low-Ppar state again this morning. Checked the falloff currents for DCRC1pA&B, compared with the standard values (see zero-column on table from Wednesday), they are 2.6/1.9 uA higher. |
| 0910 | After getting all channels into transition it looks like it's closer to the normal state. DCRC1pA/B/C falloff currents are 0.4/0.7/0.3 uA above the standard values. |
| 0925 | Set all channels to the Ib*pf=30 values from the table from Wednesday. Adjust offsets. |
| 0925 | Dial HV up to 85V. After 10 minutes, Vtest is still no lower than 46 mV. That's pretty high. Vdetector is 66.7 V. |
| 0940 | Dial HV up to 100V. |
| 0950 | HV = 100.4 V, Vtest = 53.94 mV → Vdetector = 78.4 V |
| 0950 | Dial HV up to 115 V |
| 1000 | HV = 115.0, Vtest = 62.94 → Vdetector = 89.8 V |
| 1005 | Dial HV down to 89.6, targeting Vdetector of 70 V. After 10 min do some fine adjustments. |
| 1030 | HV = 87.6 V, Vtest = 43.51 V → Vdetector = 70.18 V. Will adjust occasionally to keep near 70 V. |
| 1034 | Start 5 1-hour data series (start #6688) of 1-sided 70V data with Frontend Gain = (15/15/5)/(5/4/4), OG = 4/2, QET biases set with the Ib*pf=30 values in table from May 24, with 1000 beginning randoms, no flashing, and a 30 ADC bin threshold trigger on DCRC1 pA (Side1 pE). |
| 1038 | Adjust trigger threshold down from 30 to 25 |
| 1040 | HV = 87.2 V, Vtest = 42.67 mV → Vdetector = 70.11 V |
| 1043 | Adjust trigger threshold down from 25 to 23 |
| 1050 | HV = 87.1 V, Vtest = 42.61 mV → Vdetector = 70.04 V |
| 1135 | HV = 86.0 V, Vtest = 39.94 mV → Vdetector = 70.01 V |
| | As can be seen above I keep having to adjust the HV downward to keep Vdetector close to 70 V. This means that the leakage is slowly decreasing. The last time we had high leakage, it went away during an overnight run - in the morning we found that the leakage was back at the normal low values. So it may be returning gradually to normal again. |
| 1140 | DCRC2 seems to have lost its timing link to DCRC1. Abort data series
Timing link was fine through the entire first series but apparently stopped working at the beginning of the second series. |
| 1145 | Stopping and restarting DAQ programs seems to have fixed the timing link. Strange. |
| 1149 | Start 4 1-hour data series of 1-sided 70V data with Frontend Gain = (15/15/5)/(5/4/4), OG = 4/2, QET biases set with the Ib*pf=30 values in table from May 24, with 1000 beginning randoms, no flashing, and a 23 ADC bin threshold trigger on DCRC1 pA (Side1 pE). |
| 1156 | Abort sequence because again the timing link is not working! |
| 1210 | HV = 86.2 V, Vtest = 39.31 mV → Vdetector = 70.46 V |
| 1210 | Restarting programs again restored timing link. Stopped and started data runs three times and it worked all three times. We'll try the sequence again. |
| 1213 | Start 4 1-hour data series of 1-sided 70V data with Frontend Gain = (15/15/5)/(5/4/4), OG = 4/2, QET biases set with the Ib*pf=30 values in table from May 24, with 1000 beginning randoms, no flashing, and a 23 ADC bin threshold trigger on DCRC1 pA (Side1 pE). |
| 1216 | Abort sequence because again the timing link is not working! |
| 1220 | Turn off programs and try making DCRC2 the master: swap the ethernet cable around, change the ODB settings, then restart the programs. Again seems to work using the pulse viewer. Try starting the sequence again. |
| 1220 | Start 4 1-hour data series of 1-sided 70V data with Frontend Gain = (15/15/5)/(5/4/4), OG = 4/2, QET biases set with the Ib*pf=30 values in table from May 24, with 1000 beginning randoms, no flashing, and a 23 ADC bin threshold trigger on DCRC1 pA (Side1 pE). |
| | ok, looks like timing link is working for this series. |
| 1230 | HV = 85.6 V, Vtest = 39.00 mV → Vdetector = 69.98 V |
| 1400 | HV = 85.0 V, Vtest = 38.22 mV → Vdetector = 69.70 V |
| 1405 | Set up a fan blowing on the HV board. We noticed that today and the last time that the leakage was high (May 17) the dew point (and I guess humidity) was at a relative peak. So it does seem maybe humidity-related. |
| 1413 | Abort series, something went wrong at about 14:03, no triggers. Maybe I knocked something around and caused DCRC1pA to rail. |
| 1415 | Relock to get the channels back (DCRC1pA and DCRC2pC) |
| 1419 | Start 1 1-hour data series of 1-sided 70V data with Frontend Gain = (15/15/5)/(5/4/4), OG = 4/2, QET biases set with the Ib*pf=30 values in table from May 24, with 1000 beginning randoms, no flashing, and a 23 ADC bin threshold trigger on DCRC1 pA (Side1 pE). |
| 1430 | HV = 86.0 V, Vtest = 39.79 mV → Vdetector = 70.07 V |
| | leakage seems to have gone up after placing the fan |
| 1505 | HV = 85.4 V, Vtest = 38.27 mV → Vdetector = 70.08 V |
| | looks like leakage is back to the trend from before the fan was added, slowly decreasing. |
| 1520 | HV = 85.4 V, Vtest = 37.90 mV → Vdetector = 70.22 V |
