2017/02/15 (Wednesday)
| Setup: DIB1/3/4 → 3.2 MHz filters 3/1/2 → cable 3/1/2 →gender changer 3/1/2 → DCRC55(1)/33(2)/50(3) (on/on/off) | |
| 0855 | Tower = 34.3 mK, Main bath = 35.7% |
| 0900 | Fill LN2 cold trap bath |
| 0930 | Checking stability of DIB3pB (DCRC2pB) to SQUID jumps. Method: set QET bias to -135 μA, this is near the peak of the IbIs, and make sure to see pulses so we know it's not s/c. Adjust driver offset to get baseline near zero and record. Then try relocking or dipping into s/c and back and repeat. Front-end gain = 6. Observations: |
- After letting the channel go s/c (dropping QET bias to 0 μA or -50 μA) it generally took lots of snapping to get it back into transition at -135 μA
- The most common driver offset was 0.020
- Other offsets were -0.79, -0.304 (twice), 0.34, and 6.44 (twice).
- The two offsets nearest to the 0.020 standard were almost equidistant from 0.020. But the other intervals were different.
| 0940 | Measure how the baseline changes with driver offset, i.e. calculate Vout:driver offset conversion, or driver offset calibrated to V. Conclusion: 1 Driver Offset unit corresponds to 8.515 V, for RevC.0 with Driver Gain 1x. The click-unit in the DCRC_UI settings slider is 0.002 Driver Offset units, corresponding to 17.03 mV. (So about 6 clicks moves you 0.1 V.) The common interval seen above for phase jumps was about 0.322 Driver Offset units, corresponding to a Vout change of 2.742 V, which is a signal current change of 42.36 uA, whatever that means. |
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| 1010 | Tower/MC/Coldplate = 34.2/30.9/190 mK, Still = 1.17 K / 0.110 mbar, G1/G2 = 207.8/191.6 mbar, 1K Pot = 1.689 K / 28 mbar, Main bath = 33.4%. Boil off rate: faster than slow mode. |
| 1141 | 6“ Si bench testing. Using DCRC32 is problematic today. It won't enable 15V power in response to telnet commands (wr 30 0800). Register value seems to be set correctly, but 15V LEDs on boards are off. |
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| 1151 | Try using DCRC3, but it's got “stuck” output at power up. |
| 1202 | When first powered up and connected only to telnet, DCRC3 seems to not be stuck (register 0 is being updated) but, this quickly goes to a value of 0x0000 once dcrc_driver01 is started. This is unlike working DCRC1's behavior, which continues to update register 0 once dcrc_driver01 is started. |
| 1210 | Start LHe transfer (MB = 30.4%) |
| 1215 | Tried swapping DCRC 1&3's ip's in / Equipment / Tower01 / Settings / DCRC3 /. This initially swapped the register 0 and readout behaviour of DCRCs 1 and 3. i.e. using DCRC1's setting on DCRC3 seemed to fix DCRC3's stuck output. (both are C.1's and should thus have the same setting apart from biases, offsets, etc. ) |
| 1230 | Notice that DCRC3's output is stuck once again even though it started out good with DCRC1's settings… |
| 1240 | Shut down programs and start from scratch. Power on DCRCs 1 and 3, both are updating register 0. Start dcrc_driver01 with each DCRC having the appropriate IP address, DCRC1 register 0 continues to update, DCRC3 register 0 = 0x0000. Start tower and trigger programs, on pulse viewer, find that DCRC1 is showing traces and DCRC3 has stuck output. Stop programs, DCRC1 reg0=updating(but slow to respond), DCRC3 reg0=0x0000. Without power cycling DCRCs, swap DCRC 1&3's IP addresses in ODB. |
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| 1251 | Restart dcrc_driver01, now DCRC1 reg0=0x0000, DCRC3 reg0=updating. Pulse viewer follows suit (though it too is sometimes slow to respond). Leave pulse viewer running like this. |
| 1246 | Finish LHe transfer (MB = 94.3%) Bill Voje exchanged our He recovery gas meter for a new one, on the chance that the old one was responsible for our low recovery rates. The old one was removed with a reading of 3193, the new one is starting with a reading of 0000. |
| 1300 | DCRC3's output spontaneously freezes in pulse viewer. DCRC1 reg0=0x0000,DCRC3 reg0=0x0031. |
| 1302 | Stop programs, still have DCRC1 reg0=0x0000,DCRC3 reg0=0x0031. Restart dcrc_driver01 (IP's still swapped), DCRC1 reg0=0x0000,DCRC3 reg0=0x0000. |
| 1305 | Restore correct IP addresses in ODB, restart dcrc_driver01. DCRC1 reg0=updating,DCRC3 reg0=0x0000. Stop programs. |
| 1309 | Swap IP's in ODB, restart programs. For a few minutes, DCRC1 reg0=updating,DCRC3 reg0=0x0000, but then DCRC1 gets stuck: DCRC1 reg0=0x0000,DCRC3 reg0=0x0000. Shut down programs, restore IP's in ODB. |
Looking at a recent ODB log, run05568.ODB, from today at 12:15, looking for differences between DCRC1 and DCRC3 settings. The following settings for DCRC3 were found that are different from DCRC1:
[/Equipment/Tower01/Settings/DCRC3/General] MasterSlaveFree = INT : 2 TriggerSource = BOOL : n TriggerSource Comment = STRING : [50] TriggerSource: N=Threshold Triggers,Y=Test Signal
the settings above seem pretty normal…
[/Equipment/Tower01/Settings/DCRC3/Trigger] PhononTriggerThreshold = INT[4] : [0] 1 [1] 70 [2] 15 [3] 13
the low pA trigger above is not usual but shouldn't matter, triggering isn't enabled…
[/Equipment/Tower01/Settings/DCRC3/LED] ConnectLEDVoltagesToPhononADCs = BOOL : y
the above is clearly an error.
[/Equipment/Tower01/Settings/DCRC3/TestSignal] DDSDACScaling = INT : 341
don't know what this is but it may simply be the amplitude of the test signal
[/Equipment/Tower01/Settings/DCRC3/Phonon] TestSignalConnect = BOOL[4] : [0] y [1] y
supposedly the above settings are simply how DCRC3 was left when last being used, perhaps during SQUID tuning
| 1305 | Release pressure from main bath |
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| 1345 | Release pressure from main bath |
| 1356 | DCRC1 not responding to telnet. Power cycle DCRC1. Looks better now. |
| 1401 | Zap DCRC1 SQUIDs. |
| 1540 | Complete IbIs on DIB3PB. This was done using DCRC2, which, being a C.0 has a larger built-in driver gain. Because of this, the driver offset needed to be changed during the data taking and the points before/after matched up to form the full curve. |
| 1730 | Complete IbIs on DIB3PC. |
| 1732 | Fill LN2 cold trap. |