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2017/02/08 (Wednesday)

0857	Tower/MC/Coldplate = 35.5/34.8/192 mK, Still = 1.25 K / 0.110 mbar, G1/G2 = 178/162 mbar, 1K Pot = 1.686 K / 28 mbar, Main bath = 73.5%. Boil off rate:
	Fill LN2 cold trap bath.
0902	Setup: Ethernet cables 2/3/1→DCRC55(1)/DCRCX(4)/DCRC50(3)→nothing/nothing/nothing Timing link connected with DCRC55(1)/DCRCX(4)/DCRC50(3) = master/slave/slave. As yesterday, DCRCs 1,3 seem to operate normally, but DCRC4 has stuck outputs. The ethernet cable used does not seem to matter
0907	Power just DCRC4, with no timing link cable, still set as timing slave. Traces stuck/railed at -1.25V
0911	Power cycle and repeat. DCRC4 traces still stuck/railed at -1.25V
0913	Set DCRC4 as timing master, power cycle. DCRC4 traces glimpsed for a second, but then they stick at -0.0031
0932	Based on some advice from Sten, investigate phonon read address. From telnet session, read registers 0x00 and 0x01, which together are the “Present phonon pointer value”. On a working DCRC which is showing traces, these values are different every read, presumably they're being updated constantly to read out different parts of the trace. On a “stuck” DCRC, however, this value does not change so the same memory location is repeatedly read out. Also found that disabling ADC Writes to SDRam (0x15 bit 5 or DCRC1/General/) reproduces the “stuck” behaviour on a working DCRC.
0948	Powered DCRC1 and DCRC3, not plugged into any DIBs. They both appear to be working properly. Going to wait and see if DCRC3 starts getting stuck output again.
1055	DCRC3 is still working. Try issuing some commands. Adjust Driver Offset on all 4 channels. pD is railed but comes back if SQUID setting set to 0. After 5 minutes DCRC3 is still working.
1205	DCRC3 continues to function
1228	DCRC3 continues to function. Power down DCRCs.
1229	Set up to tune DIB4 SQUIDs using DCRC1.
1234	Zap DIB4 SQUIDs.
1250	DIB4 PD tuned. DIB4PC looks to have some trapped flux still. Zap SQUIDs again.
1415	DIB4 PC modulation curve still has some kinks. Just try to lock in the best region.

1441	DIB4 PB was able to be tuned and responds to QET bias changes, but no pulses seen.
1447	DIB4 PA still does not respond to QET bias changes [image not archived: sad.svg]

SQUID settings so far this run
Channel	SQUID Bias (uA)	Lockpoint (mV)	Polarity
DIB1 pA	-91.2	-4.3	non-inverted
DIB1 pB	-78.8	-3.3	non-inverted
DIB1 pC	-82.0	-4.8	non-inverted
DIB1 pD	-85.2	-2.7	non-inverted

DIB3 pA	-54.0	-1.8	non-inverted
DIB3 pB	-60.3	-1.8	non-inverted
DIB3 pC	-46.3	-2.0	non-inverted
DIB3 pD	N/A	N/A	non-inverted

DIB4 pA	-81.8	-3.3	non-inverted
DIB4 pB	-78.3	-2.9	non-inverted
DIB4 pC	-85.0	-3.5	inverted
DIB4 pD	-85.0	-5.7	inverted

1456	Try 'standard' DCRC setup. Setup: DIB1/3/4 → 3.2 MHz filters → cables → DCRC55(1)/DCRC33(2)/DCRC50(3)
1458	After powering boards, tower spikes to 300 mK, but cools back to base.
1500	All 3 boards respond to telnet. All 3 have rd 0 = 0x0000 (phonon pointer). Enable DCRCs in ODB with DCRC1 as master and start DCRC programs.
1502	All 3 boards showing noise traces and are updating register 0.

1543	Can't seem to get DCRC2 QETs to respond. Power cycle DCRC2.
1550	Notice that the detector cable for DIB3 had come loose at the e-box due to slipping the transfer tube under it. Fix this and start everything up again.
1552	DCRC2 PC seems to respond to QET bias changes now (didn't check others yet) Zap all SQUIDs.

Channel Roll Call
DIB	Channel	Responds to QET bias changes	Notes
DIB1PA	Side1 pE	yes	good pulses
DIB1PB	Side1 pB	yes	good pulses
DIB1PC	Side1 pD	yes	good pulses
DIB1PD	Side2 pE	yes	good pulses

DIB3PA	Side2 pB	no
DIB3PB	Side2 pA	yes	good pulses
DIB3PC	Side1 pA	yes	good pulses
DIB3PD	n/c	no

DIB4PA	Side2 pC	no
DIB4PB	Side2 pF	yes, initially, but later no	Can't see pulses
DIB4PC	Side1 pC	yes	good pulses
DIB4PD	Side1 pF	yes	good pulses

1642	Fill LN2 cold trap bath.