UMN CDMS Wiki archive
start › cdms › k100 › run_diary › 20161205

2016/12/05 (Monday)

Previous Day

Setup: DIB1/3/4 → 3.2 MHz filters → cables1/2/3 → DCRC55(1)/33(2)/50(3)
0840 Put 22Na source back in safe
0910 Finish supermini IbIs:
channel QET bias Vbias-V300 driver gain New value
DCRC1 pA 182 0.283 x2 0.2925
DCRC1 pB 185 0.1095 x2 0.158
DCRC1 pC 185 0.5765 x2 0.626
DCRC1 pD 190 -0.0776 x2 -0.041
DCRC2 pB -174 -0.8042 x1 0.493
DCRC2 pC -173 0.1193 x1 0.16
DCRC3 pB 207 0.005 x2 0.019
DCRC3 pC 165 0.0735 x2 0.071
DCRC3 pD 202 -0.162 x2 -0.157

The values above are close to standard (apart from the messy channels DCRC1pB and DCRC2pB), so nothing seems to be in a metastable state. But in some cases the measurement had to be repeated. I started by measuring Vbias, then V300; in some cases, this produced a value far from standard, but then when I returned to Vbias the value had shifted and it was again close to standard.

Using the Nov 10-11 data with prefactors calculated using adjusted offsets, I estimated the total phonon collection efficiency at 15%.

Using the Dec 2 data, with higher QET biases, also using prefactors calculated using adjusted offsets, I estimated the total phonon collection efficiency at 13.5%.

If I use non-adjusted offsets, i.e. offsets that make the normal resistance flat with bias, then both of these estimates fall to about 11%. That is, they agree better with the non-adjusted offsets. So, at second pass, it seems the non-adjusted offsets give more consistent results, and the phonon collection efficiency is around 11%.

1110 Tower/MC/Coldplate = 33.4/36.1/219 mK, Still = 1.3 K / 110 μbar, G1/G2 = 190/185 mbar, 1K Pot = 1.69 K / 24 mbar. MB = 26.0%.
1115 Fill LN2 cold trap bath.
1240 Preparing to set up HV mode again
Previously used SQUID settings in HV mode
channel SQUID bias Lockpoint
DCRC1pA -76.5 -3.1
DCRC1pB -81.2 -3.7
DCRC1pC -70 -3.5
DCRC3pB -84.8 -4.7
DCRC3pC -60.2 -1.3
DCRC3pD -51.3 -4.7
1250 Commence LHe transfer (22.3%).
1305 Switch to HV mode as follows:
1) Turn off programs TriggerFE, TowerFE, DCRCdriver. 2) Unplug power from DCRCs. 3) Unplug DIB cables from DCRCs 4) Plug DIB cables and DCRC1,3 into HV board 5) Plug in power for DCRC1,3.
6) Plug in timing link cable with DCRC1 master. 7) Set ODB to enable DCRC1,3, disable others, set DCRC1 to Master, others to Slave. 8) Set ODB Phonon settings as table above. 9) Restart programs.
Setup: DIB1/3/4 → 3.2 MHz filters → cables 1,2,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3)
1310 Zap SQUIDs
1325 Finish LHe transfer at 92.5%
1330 Set all the QET biases to the previous standards, adjust driver offsets, all show pulses
1350 Release pressure from main bath
1405 Finish IbIs curve for DCRC1pA
The transition region of the curve seems shifted to the right/downward compared to the Nov29-30 curve. This implies lower parasitic power. Maybe this is a metastable state.
At 182 uA QET bias the curve is 0.13 V below the 300 uA value, much smaller than the standard 0.28 V
1410 Release pressure from main bath
1435 Finish IbIs curve for DCRC1pB.
This one had a messed up IbIs curve in 2-sided mode apparently due to SQUID phase jumps - but now it's a perfectly good IbIs curve. Don't know why - the only apparent change is the addition of the HV board.
1505 Finish IbIs curve for DCRC1pC.
1515 Changed Front-End Gain on DCRC3pB from 5 down to 1. This seems to reduce the noise from this always-noisy channel (it's the one where the trace in the HV board has to cross ground planes). It also makes the necessary driver offset much more reasonable, it was near the bottom of the scale before.
1556 Finish IbIs curve for DCRC3pB. IbIs is a mess as it has several SQUID phase jumps. Additionally, the position of the phase jump seems dependent on the driver offset. One can change the driver offset and take a smooth set of points over a region that previously had a discontinuity.
1617 Finish IbIs curve for DCRC3pC. Looks good.
1633 Finish IbIs curve for DCRC3pD. Looks good.
1650 Fill LN2 cold trap full.

Next Day