2016/08/26 (Friday)

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	Setup: iZIP mode, DIB1/2/3 → 3.2 MHz filters → cables → DCRC55(1)/33(2)/50(3), Tower has been cooled below Al transition with mu-metal shield 27.7cm below standard position
	DCRCs powered overnight. Pumping on IVC with turbo pump overnight. Baked detector for 12 hours overnight, Tower at 0.4 K until 06:05.
0840	Tower/MC/Coldplate = 38.3/32.6/153 mK, Still = 1.30 K / 90 μbar, G1/G2 = 180/160 mbar, 1K Pot = 1.52 K / 4.5 mbar, MB = 67.5%. Boiloff rate:
0845	Fill LN2 cold trap bath.
0845	Check phonon channels. One channel on DCRC2 is railed - all have some choppy noise, looking at the telnet sessions it looks like the timing link wasn't reset after repowering DCRC2. Reset timing link. This causes all DCRC2 channels to rail…
0850	Can't restore the DCRC2 phonons. Power cycle all three DCRCs.
0915	Tower has fallen to 36.7 mK. Repower the DCRCs. Set up timing link. Start MIDAS programs.
0925	Still having trouble with phonon channels, particularly DCRC2, all railed, can't unrail.
0930	DCRC1 pD looks crappy, but lowering the QET bias from 110 to 90 looks better…
0955	Zap SQUIDs
1115	Cannot unrail DIB2 phonons. Charge channels also railed. Try turning FET power on and then off - Tower heats up and cools off as normal, but no change in the readout channels. DCRC1 pD however looks much better after the zap.
1125	All DCRC1 and DCRC3 channels look good, but DCRC2 has a problem.
1135	After ensuring connection for all timing link cables into DCRCs (one into DCRC2 seemed loose), retry the pulses. DIB2 charge channels are now alive! Adjust Driver Offsets on other channels to bring them to life. Ready to take data.
1140	With DIB2 FETs turned off, Start three sets of 30min background series at -6/+6 V with FG=5/2/5, OG=8/3/8, with 1000 initial randoms, 1000 ending randoms. Trigger on DIB1 phA with threshold of 30ADC bins, with 150 us pileup cut window.
1516	Switch to HV mode: DIB1/2/3 → 3.2 MHz filters → nothing/disconnector board/remapping board → HVside2board → DCRC55(1)/50(3). Disconnector board has all charge lines disconnected.
1522	Power up DCRC1&3 and initiate telnet sessions, disable DCRC2 in ODB.
1525	Forgot to disable logger while looking at pulses so there's a junk series called 07160826_1524
1531	All phonons railed, charge looks good. In order to take a quick look at HV breakdown, only revived DIB1PC, as this has been our standard channel.
1545	Original phonon baseline: -0.75V. Increase HV to 30 V, Vleak = 32 V: pulses disappear. Reduce to 26 V, 27 mV. Baseline = -0.644 V, noise very low. Breakdown limit: 14.1 V
1600	Increase HV to -26 V, Vleak = -33 V: pulses disappear. Reduce to -21 V, -24 mV. Baseline = -0.58 V, noise very low. Breakdown limit: -10.4 V
1612	Cease pumping on IVC.
1613	Fill LN2 cold trap.
1645	Turn HV to 0V. Turn off power supply. Jump together negative and positive leads into HV Board in order to ground both sides of the detector overnight.
	Commence 12-hour bake using DCRCs 1 & 3 in HV Mode. Tower temp gets up to ~310mK.

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