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2016/02/08 (Monday)

	Setup: iZIP mode, DIB1/2/3 → cables → 3.2 MHz filters → DCRC55/33/50
	Taking Y-Be photoneutron data overnight. Last flash at 07:30
0910	Remove Y source from source holder and put back into safe.
0915	Tower/MC(H35)/MC sensor/Cold Plate = 31.6/28.0/43/165 mK, Still = 1.29 K / 0.085 mbar, G1/G2 = 125/120 mbar, 1K Pot = 1.51 K / 2 mbar, Main bath = 36.2%
	1K Pot very low, empty I guess. It doesn't seem to be hurting the still, but base is up a bit. Could try heating still - but better to restore pot to normal conditions.
0920	Tweak 1K Pot needle valve open additional 5 degrees. Settles around 1.72 K / 15 mbar
0925	Fill LN2 cold trap Dewar.
0930	New switchable pi-filter boards have arrived. Nick has added the grounding strap to ground the dsub shell to the ground plane. Preparing to test.
0938	Start test series at 0/0 V with FG=5/2/5, OG=3, with 1000 initial randoms, 0 ending randoms, no flash. Trigger on DIB1 phA with threshold of 20ADC bins and DIB1 qInner&qOuter each with threshold 210 ADC bins, with 150 us pileup cut window. Stopping after randoms finish.
1010	Remove Pi Filter from DCRC55 (DIB1) for baseline test before adding the switchable Pi Filter boards.
1017	Start test series with DIB1 unfiltered at 0/0 V with FG=5/2/5, OG=3, with 1000 initial randoms, 0 ending randoms, no flash. Trigger on DIB1 phA with threshold of 20ADC bins and DIB1 qInner&qOuter each with threshold 210 ADC bins, with 150 us pileup cut window. Stopping after randoms finish.
1030	Power off DCRC55 and attach switchable pi filterboard. All pi filter lines switched on. MC temp climbed to ~40mK. Powered on and set up DCRCs. Multiple zapping of DCRC55 had normal rise and fall of MC temp, but baseline wouldn't fall below 40mK.
1110	Power cycle DCRC. Disconnect DCRC and filter board. Base temp returns to normal (31mK).
1130	Switch off all pi filter lines. Reconnect filter board and DCRC to detector cable. Powering on DCRC causes MC temp to rapidly rise to 40mK.
1325	Upon closer inspection, several solder leads on the filter board were unfinished. After repairing them, reconnect filter board(filters switched off) and DCRC.
	Small spike to 34mK upon powering DCRC, quickly returned to normal base temp.
1331	Zapping squids.
1409	Start test series with DIB1 filter board attached but switched off at 0/0 V with FG=5/2/5, OG=3, with 1000 initial randoms, 0 ending randoms, no flash. Trigger on DIB1 phA with threshold of 20ADC bins and DIB1 qInner&qOuter each with threshold 210 ADC bins, with 150 us pileup cut window. Stopping after randoms finish.
1412	Start test series with DIB1 filter board attached and switched on at 0/0 V with FG=5/2/5, OG=3, with 1000 initial randoms, 0 ending randoms, no flash. Trigger on DIB1 phA with threshold of 20ADC bins and DIB1 qInner&qOuter each with threshold 210 ADC bins, with 150 us pileup cut window. Stopping after randoms finish.

1450	Unshielded filterboard preforms worse than either no filter or standard DSub filter. Switching on filter board improves things somewhat.
1515	Build copper shielding for top and bottom of filter board. Normal base temp (31mK) with filter installed and board powered on.
1521	Zapping squids
1535	Start test series with DIB1 shielded filter board attached and switched on at 0/0 V with FG=5/2/5, OG=3, with 1000 initial randoms, 0 ending randoms, no flash. Trigger on DIB1 phA with threshold of 20ADC bins and DIB1 qInner&qOuter each with threshold 210 ADC bins, with 150 us pileup cut window. Stopping after randoms finish.

	Adding a shield seems to improve overall noise levels to that similar to the standard setup (At least for this channel. Others are less clear.)

1540	Commence LHe transfer (25.8%).
1545	Power off DCRC55. Disconnect shielded filter board from DCRC. Repower DCRC55 and zap SQUIDs in preparation for overnight data.
1550	1K Pot pressure had fallen to 6 mbar. Tweak needle valve open additional 5 degrees. Settles at about 1.7 K / 19 mbar
1630	End LHe transfer (90.6%).
1650	Release pressure from Main Bath.
1718	Fill LN2 cold trap full.
1720	Check phonon traces. Two railed after board restart. Adjust driver offsets, and everything's looking good.
	Disable high-threshold Qi&Qo triggers.
1725	Place Cf source inside fridge shield ~11“ down from top.
1730	Start 17 hours of 30min Cf series at -4/+4 V with FG=5/2/5, OG=3, with 1000 initial randoms, 1000 ending randoms, 30s flash and 25 minute cooldown in between series. Trigger on DIB1 phA with threshold of 20ADC bins, with 150 us pileup cut window.