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2015/11/16 (Monday)

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Current setup: iZIP mode, DIB1/2/3 → cables → 3.2 MHz filters → DCRC55/33/50.
Overnight: taking Y data, last flash at 7:58.
0900 Tower/MC(H35)/MC sensor/Cold Plate = 31.0/25.3/40.7/155 mK, Still = 1.29 K / 0.12 mbar, G1/G2 = 135/135 mbar, 1K Pot = 1.72 K / 20 mbar, Main bath = 54.8%
0910 Fill LN2 cold trap Dewar.
1100 Three of the channels were railed (it looks like it happened around 0300): DIB1 pC, DIB2 pD, and DIB3 pD. It's unclear why they're railed, but changing the Driver Offset brings them back into working order. Update the MultiDAQ +/-4V file to reflect the new values.
1105 Start 3 cycles of 30min runs of Y data at +/-4V, FG=5/2/5, OG=3, 1000 initial randoms, 2000 events/file, 30s flash and 25min cooldown in between. With all trigger thresholds set to 65ADC bins.
1506 Start 17 cycles of 30min runs of Y data at +/-4V, FG=5/2/5, OG=3, 1000 initial randoms, 2000 events/file, 30s flash and 25min cooldown in between. With all trigger thresholds set to 65ADC bins.
1659 Fill LN2 cold trap full.

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