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2015/06/30 (Tuesday)

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0840 Fill LN2 cold trap Dewar
0850 Remove Cf source
0853 MC/Tower/Cold Plate = 26.5/31.6/143 mK, Still = 2 mW / 1.11 K / 0.11 mbar, G1/G2 = 215/205 mbar, 1K Pot = 1.69 K / 16 mbar, Main bath = 67.4%
0900 3.2 MHz Pi filter and 10 MHz C filter D-plugs have been inserted between EBox and DCRC55/DIB1 and DCRC33/DIB2 respectively
0923 Power up DCRCs, set timing link, zap SQUIDs
? - 1057 DIB1(DCRC55 with pi filter) phonon channel C not behaving properly. Needs very large driver offset to not rail. With gains set to 1/0 and D.O. to 0, it isn't railed but it mostly shows pulseless noise while the other three channels see pulses; pC only sees extremely large/saturated pulses, and occasionally a 1 KHz sinusoid. Tried powercycling DCRC55 but pC still problematic. Remove filter from DIB1 and repower board.
1117 Zap DIB1 SQUIDs and set up board.
1134 Adjust DIB1pA driver offset to -0.092
1139 All channels showing pulses. Commence mini-bake (i.e. turn on all LEDs until temperature stabilizes then turn off).
DCRCs 33 and 50 show register 30 as 0003 while DCRC55 shows register 30 as 0803 - the vi did not set them all correctly. Manually enter wr 30 0803.
With DIB1 flashing, 120 mK; add DIB3, 260 mK; add DIB2, 310 mK
1150 Stop mini-bake
1221 Set -4/4 V, start bkg data. All phonon thresholds at 50.
1240 Stop data, 0/0 V, flash 30 seconds.
1256 Set phonon thresholds to yesterday's values. Start bkg data.
1302 After randoms data taking is slow: event rate ~1 Hz, CPU usage ~100%. Stop data.
1305 Restart data, same problem. Stop data.
1310 Set new phonon thresholds, to the lowest factor of 5 that avoids triggering on noise:
Current phonon thresholds
pA pB pC pD
DIB1 20 20 25 20
DIB2 25 20 20 20
DIB3 15 15 15 10
1313 Test data run: event rate much better. Stop data, 0/0 V, flash 30 seconds
1335 Set -4/+4 V, start bkg data
1353 Stop data, 0/0 V, flash 30 seconds
1400 Put Ba source on fridge 6“ down from top of shield
1415 Set -4/+4 V, start Ba data - after randoms event rate drops near 1 Hz. Move Ba source to top of shield. Stop data.
1418 Restart Ba data. Event rate better, near 14 Hz.
1435 Stop data, 0/0 V, flash 30 seconds
1451 Set -4/+4 V, start Ba data.
1508 Stop data, 0/0 V, flash 30 seconds
1527 Set -4/+4 V, start Ba data.
1546 Stop data, 0/0 V, flash 30 seconds
1605 Unplug DCRC50 from DIB3, put in 3.2 MHz pi filter, set up and zap SQUIDs
1620 DIB3pC railed, unrailing required very high driver offset: 0.480 V, but still no pulses. DIB3pD not railed but showing very few pulses, only very large saturated pulses.
1630 Reset thresholds:
Current phonon thresholds
pA pB pC pD
DIB1 25 30 35 20
DIB2 25 20 25 25
DIB3 60 20 10* 10*

* indicates these channels only showing saturated pulses.

1640 Noticed that on DIB3pD the gains were set to 1/1. Set to 7/0 - channel rails. Unrailed with driver offset of -0.26 but very noisy. Increase DIB3pD threshold to 100.
1641 DIB3pB baseline shifted, adjust driver offset to -0.92.
1645 Set -4/+4 V, start Ba data
1702 Stop data, 0/0 V, flash 30 seconds
1725 Bake all detectors overnight.
1730 Place Cf source on fridge at detector level
1730 Fill LN2 cold trap full.

Lessons from today:

  • The 3.2 MHz pi filter seems to screw up Phonon Channel C in a strange way: unusually large offset, insensitive to any pulses except very large ones. (update: filter changes apparent QET properties as seen in IbIs, requires higher QET bias setting)
  • High event rates seem to bog down the vi/computer, leading to low recorded event rate. Thresholds must be set high enough to avoid noise and sources must be placed sufficiently far away to avoid this problem.

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