2020/08/11 (Tuesday)
- Lab in-person: Zach
- Virtual partner: Matt
| Setup | Run 73. DIB 1/3/4 → Stripline 43/48/41 → pi-filters 1/2/3 → Cable 3/1/2 → nothing/nothing/accessory_interposer → HV_Conn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC55(1)-master; DCRC33(2) → HV control. DCRCs on overnight. Lead/poly shield erected (4 lead walls, 2 poly walls). |
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| Here's the table I made for setting QET bias, with new empirical temperature ranges. |
| QET bias table | ||||
|---|---|---|---|---|
| Temperature range | ||||
| 51 to at least 54 | 55.7 | ? | 56 to at least 58 | |
| DCRC4pB | 320 | 310 | 300 | 290 |
| DCRC4pC | 370 | 360 | 350 | 340 |
| DCRC1pB | 360 | 360 | 350 | 350 |
| DCRC1pC | 420 | 410 | 400 | 390 |
| DCRC1pD | 420 | 410 | 400 | 390 |
| 0630 | Write a sequence for +50V drifting at 30.5 mV/s HVdrift_pos50V_30p5mVps_multiloop10_nopre_60min.msl |
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| OOPS - this was a mistake, I increased the drift rate but I should have decreased it | |
| 0635 | Start a 60 min series at HV = +50V, drifting 0.0305 V/s, no prebias, CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (0,320,370,0)/(0,360,420,420) uA, Front-End Gains = (3/3/3)/(5/5/5) 1000 BOR & 5 Hz in-run randoms, trigger on DCRC1pD threshold = 8 Use sequence HVdrift_pos50V_30p5mVps_multiloop10_nopre_60min.msl |
| 0635 | Tower = 52.4 mK |
| 0635 | Vtest = 2.4 mV shortly after drift begins. Drift appears to start at +49.4 V. |
| 0741 | Vtest = 5.0 mV, HV = 158.6 V, drift ends. Lag ratio = 1.10. |
| 0741 | Tower = 52.0 mK. |
 |
| This was a mistake, I increased the drift rate when I should have decreased it |
| estimated (from last time) that new drift should be 27.5 mV/s |
| Comparing this low-temperature series with the last somewhat-higher-temp series: gain at t0 is nearly the same |
| 1040 | Write sequence for +50V drifted at 27.5 mV/s HVdrift_pos50V_27p5mVps_multiloop10_nopre_60min.msl |
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| 1045 | Start a 60 min series at HV = +50V, drifting 0.0275 V/s, no prebias, CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (0,320,370,0)/(0,360,420,420) uA, Front-End Gains = (3/3/3)/(5/5/5) 1000 BOR & 5 Hz in-run randoms, trigger on DCRC1pD threshold = 8 Use sequence HVdrift_pos50V_27p5mVps_multiloop10_nopre_60min.msl |
| 1045 | Tower = 51.7 mK |
| 1045 | Vtest = 2.5 mV shortly after drift begins. Drift appears to start at +49.3 V. |
| 1138 | MIDAS crash, around 11:38:10. HV stuck at 127.03 V. Overall rate suggests a 1.13 lag ratio. |
 |
| Looks pretty good before the DAQ crash |
| 1215 | Kill MIDAS and manually kill the three DAQ programs. I want to make sure the sequencer doesn't update DCRC2 causing a sudden HV change. |
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| 1220 | Restart MIDAS. DAQ programs are off. Stop sequence. DCRC2 /Charge/Bias is at 8.545 , suggesting HV of 128.7925, a little higher than where it is stuck. Reset it to 8.585 on the ODB Start DAQ programs with only DCRC2 and DCRC1 enabled (didn't work with all three enabled). Saw HV shift a little after starting Tower_fe, indicating the new ODB settings have kicked in. |
| 1235 | Write sequence to step down HV and to flash. Run the sequence. |
| 1245 | After fiddling with combinations of DCRCs to enable, finally get DAQ programs restarted with all three enabled. |
| 1150 | Zach body temp = 98.2 |
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| 1210 | Zach arrives at lab. |
| 1213 | Tower/MC/Coldplate = 52.7/38.1/196 mK, Still = 1.43 K / 0.12 mbar / 0 mW, G1/G2= 400/365 mbar, 1K Pot = 1.65 K / 26±2 mbar. |
| 1214 | MB = 58.1% |
| 1228 | Filled LN2 cold trap dewar. |
| 1232 | Zach leaves lab. |
| 1320 | Zach body temp = 97.1 |
- NOTE: while looking at noise widths today, it was noticed that the first 500 or so of the 1000 initial randoms is much noisier than the later initial randoms and the in-run randoms. This correlates in time with a period in which Vtest is still settling after the initial bias rampup. So it may make sense to delay starting data for 30-60 seconds after the rampup ends and the drift begins.
- this is at least true for data without prebias, it may be less necessary for data with prebias.
- need to think about how to do this in no-prebias case. We would need to pause before the drift starts. We would probably want to start drift at higher than target bias to compensate for the time waiting.
| 1600 | Write sequence to drift from +75V at 31.0 mV/s. HVdrift_pos75V_31p0mVps_multiloop10_nopre_60min.msl |
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| 1605 | Tower = 56.4 mK |
| 1610 | Set QET bias to 4th column values. Phonon channels look OK. (maybe these will be too low…) |
| 1614 | Start a 60 min series at HV = +75V, drifting 0.0310 V/s, no prebias, CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (0, 1000 BOR & 5 Hz in-run randoms, trigger on DCRC1pD threshold = 8 Use sequence HVdrift_pos50V_31p0mVps_multiloop10_nopre_60min.msl Looks like I set the DCRC4 QET biases to 320, 370 by mistake |
| 1614 | Tower = 56.3 mK |
| 1615 | Vtest = 3.3 mV shortly after drift begins. Drift appears to start at +74.5 V. |
| 1720 | Vtest = 5.5 mV, HV = 185.0 V, drift ends. Lag ratio = 1.10. |
| 1720 | Tower = 55.6 mK. |
 |
| Drift is a little fast, should try 30.1 mV/s |
| 1640 | MB = 52.3% |
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| 2240 | Tower = 53.7 mK |
| 2245 | Set QET biases to Column 1 values |
| 2245 | Write sequence to drift from +75V at 30.1 mV/s. HVdrift_pos75V_30p1mVps_multiloop10_nopre_60min.msl |
| 2249 | Start a 60 min series at HV = +75V, drifting 0.0301 V/s, no prebias, CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (0,290,340,0)/(0,360,420,420) uA, Front-End Gains = (3/3/3)/(5/5/5) 1000 BOR & 5 Hz in-run randoms, trigger on DCRC1pD threshold = 8 Use sequence HVdrift_pos50V_30p1mVps_multiloop10_nopre_60min.msl |
| 2250 | Tower = 53.5 mK |
| 2250 | Vtest = 3.4 mV shortly after drift begins. Drift appears to start at +74.5 V. |
| 2355 | Vtest = 5.5 mV, HV = 182.4 V, drift ends. Lag ratio = 1.10. |
| 2355 | Tower = 53.0 mK. |
 |
| Drift rate looks perfect. |
| But note that the gain is a lot lower than the last one, again presumably because the temperature and QET bias settings were different |