2019/07/23 (Tuesday)
| Setup | DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer ?/3/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC55(1) DCRC33(2) → 1kV power supply → HV input Three walls of the lead/poly shield are up. |
|---|---|
| Status: Taking PuBe source in lab behind lead stack. | |
| 0830 | had trouble yesterday running a new sequence that wouldn't either a)crash the DAQ b)write an empty first dump, or both. Write a new sequence \\HVdrift_8X180V_3p56VPM_loopversion_prebias_10_2_dur_35min_flashDCRC_1_4.msl\\. This is a minimal modification of the 2.49 VPM we were using for bg data - I changed the step time for the drift from 10 seconds to 7 seconds. Let's try to run it. |
| 0841 | Start a sequence of 8 @ 35 min series at HV = 180→306V, rate 3.56V/min, with 10% prebias for 2 minutes, flash at end with 30 min wait. CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/495)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pD threshold = 6, baseline/sample length = 120/28 (standard 16/5), phonon pre-pulse 500 (standard is 500). Use sequence HVdrift_8X180V_3p56VPM_loopversion_prebias_10_2_dur_35min_flashDCRC_1_4.msl |
| OK this seems to be working. No DAQ crash, and the first dump has data. | |
| 0943 | Fill LN2 cold trap bath. |
| 0950 | Tower/MC/Coldplate = 39.9/31.2/199 mK, Still = 1.31 K/ 0.095 mbar / 0 mW, G1/G2= 116/105 mbar, 1K Pot = 1.7 K / 65±5 mbar. MB= 64.8% |
| above is not long after a flash | |
| 1010 | Stop sequence before second series starts. |
| Looking at this morning's series the gain is clearly falling. Looks like we need to increase the drift rate by an additional 0.8 VPM. | |
| 1043 | Erect south shield wall with NaI detectors and Pb. |
| 1050 | Write sequence HVdrift_1X180V_4p37VPM_loopversion_prebias_10_2_dur_33min_flashDCRC_1_4.msl. Hope it works. |
| 1057 | accidentally took some data, checked channels with logger still set to write data |
| 1058 | Start a sequence of 1 @ 33 min series at HV = 180→326V, rate 4.37V/min, with 10% prebias for 2 minutes, flash at end with 30 min wait. CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/495)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pD threshold = 6, baseline/sample length = 120/28 (standard 16/5), phonon pre-pulse 500 (standard is 500). Use sequence HVdrift_1X180V_4p37VPM_loopversion_prebias_10_2_dur_33min_flashDCRC_1_4.msl |
| Sequence is running and the first dump has data in it. Good. I guess all the problems yesterday were fluky nonsense. | |
| This series looks pretty close to the right drift rate, maybe 0.06 VPM too fast. I'll make a slight adjustment to the sequence. We'll change DCRC2qI in -0.015 increments with 8 second wait. | |
| 1241 | Got NaI B reading out pulses well. It's biased at 800V from a Bertan 375P HV supply, output goes to PS776 amplifier, then gets split in a Lecroy 628 Fan In/Out, then to an Ortec 452 amplifier with (Neg input, G=100, shaping=6us, -10V output). Let's try to feed this into one of the spare DCRCs. Plug it into DCRC3 pB input via the LED line adapter. |
| 1252 | Turn off DCRC programs. Enable DCRC3, set it to be slave with charge/phonon waveform length = 128/1024 and charge/phonon prepulse = 50/512. Enable ConnectLEDVoltagesToPhononADCs, set all phonon biases to 0 and gains to 1. Restart DCRC programs, can see upright NaI pulses on DCRC3 just fine. Everything seems to be working nicely. [image not archived: cool.svg] |
| 1315 | Wrote new sequence: HVdrift_1X180V_4p31VPM_loopversion_prebias_10_2_dur_34min_flashDCRC_1_4.msl |
| 1321 | Start a sequence of 1 @ 34 min series at HV = 180→327V, rate 4.31V/min, with 10% prebias for 2 minutes, flash at end with 30 min wait. CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/495)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pD threshold = 6, baseline/sample length = 120/28 (standard 16/5), phonon pre-pulse 500 (standard is 500). NaI detector: 800 V → NaI B (dynode terminated) → PS776 → Lecroy 628 Fan In/Out → Ortec 452(Neg input, G=100, shaping=6us, -10V output) → DCRC3 PB, Driver Gains = 1, PhononWaveFormLength = 1024 (512 samples), PhononPrepulseSamples = 512 (512 samples) Use sequence HVdrift_1X180V_4p31VPM_loopversion_prebias_10_2_dur_34min_flashDCRC_1_4.msl |
| 1325 | Wrote new sequence, 8 repetitions of above: HVdrift_8X180V_4p31VPM_loopversion_prebias_10_2_dur_34min_flashDCRC_1_4.msl |
| 1410 | Realize DCRC3 (NaI) prepulse=trace length. Change DCRC3 phonon prepulse to 256. |
| 1445 | Change autoprocessing to also handle NaI signal. |
| 1515 | Start a sequence of 8 @ 34 min series at HV = 180→327V, rate 4.31V/min, with 10% prebias for 2 minutes, flash at end with 30 min wait. CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (490/400/495)/(420/480/450) uA, Front-End Gains = (2/2/3)/(5/5/5) 1000 BOR, 5Hz InRun randoms, trigger on DCRC1pD threshold = 6, baseline/sample length = 120/28 (standard 16/5), phonon pre-pulse 500 (standard is 500). NaI detector: 800 V → NaI B (dynode terminated) → PS776 → Lecroy 628 Fan In/Out → Ortec 452(Neg input, G=100, shaping=6us, -10V output) → DCRC3 PB, Driver Gains = 1, PhononWaveFormLength = 1024 (512 samples), PhononPrepulseSamples = 512 (512 samples) Use sequence HVdrift_8X180V_4p31VPM_loopversion_prebias_10_2_dur_34min_flashDCRC_1_4.msl |
| 1630 | Fill LN2 cold trap bath. |
| 2105 | Strange staircase-pattern in Vtest. Not all of the series look quite like this though.  Update: this is probably a beats phenomenon. The current sequence steps up the voltage during data taking every 15 seconds (nominal). The VI updates every 6 seconds. Probably every time the voltage is increased there's a spike in leakage which falls off rapidly. If the VI is in sync with the spike you get a high point on the plot, but as it goes out of sync you get lower and lower points. (Zoomed in you can see that the VI has a high point followed by two low points.) |
| 2130 | Series 07190723_2122 has an empty first dump. Seems to have BOR randoms in dumps 2,3 and is triggering normally by dump 4. Failed autoproc. |