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2019/06/07 (Friday)

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Setup DIB1/3/4 → 3.2 MHz filters 2/3/1 → cable 3/1/2 → gender changer ?/3/2 → HVConn 1/3/2 → HV 1/2 → DCRCX(4)/DCRC55(1)
DCRC33(2) → 1kV power supply → HV input
Let's take some 0-volt data, it might help with the calibration of HV data.
0802 Start a 77 min series at HV = 0V
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (420/400/440)/(420/400/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR and 1000 EOR randoms, , trigger on DCRC1pB/C/D threshold = 6/6/6.
0847 Tower/MC/Coldplate = 45.0/31.1/178 mK, Still = 1.01 K / 0.090 mbar, G1/G2 = 189/179 mbar, 1K Pot = 1.63 K / 22 mbar. MB = 79.3%
coldplate and still are reading in their “low” modes for whatever reason
Tower temperature continues to fall linearly, slowly
0850 Fill LN2 Cold trap bath

Summary of observations of noise in recent data:

  • The best noise width so far is 24 eVee. This is from the five 300→400V series on June 5.
  • Today's 0V data seems to have a noise width of 680 eVee. (consistent with earlier 0V noise this run, doesn't seem to be changing.)
  • Recent 200V / 300V data have noise widths 32 eVee / 40 eVee.
  • In recent data the uncalibrated noise width (PTOFamps) is for 0V/200V/300V = 1.7/3.6/8.5 nA. So this makes it look like noise does increase with bias
    • in contrast to constant-bias data where the effective bias falls but the noise width doesn't change. Constant 1.25V data gives constant 2.0 nA noise width.
  • The noise on June 5 at 300V was 34 eVee, better than the later 300V cases. Difference was that it was slower and there was more leakage current, so the effective bias was lower
1155 Build a sequence for 250→400V bias: 
[fritts@jiajin /home/hep/cdmssoft/scdmsDAQ/MidasDAQ/online/scripts/pysequencer]: python HVscan.py -iDCRC 2 -HVs 250 -HVcalFile HV_calibrations/HV_DCRC2_control_cals_440V_190603.txt -HVdriftRate 0.065 -HVpreBias 5/1 -tSeries 38 -DCRCs2Flash 1,4 > ../../sequencer/HVdrift_250V_3p9VPM_prebias_5_4_dur_38min_flashDCRC_1_4.msl
1200 Check channels, all look OK.
1203 Start a 38 min series at HV = 250→400V, rate +3.9V/min with 5% prebias for 1 minutes, flash at end with 30 min wait.
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (420/400/440)/(420/400/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR and 1000 EOR randoms, , trigger on DCRC1pB/C/D threshold = 6/6/6.
Use sequence HVdrift_250V_3p9VPM_prebias_5_4_dur_38min_flashDCRC_1_4.msl
as before the rampup seems to take about 2 s/V
1355 Start a 38 min series at HV = 250→400V, rate +3.9V/min with 5% prebias for 1 minutes, flash at end with 30 min wait.
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (420/400/440)/(420/400/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR and 1000 EOR randoms, , trigger on DCRC1pB/C/D threshold = 6/6/6.
Use sequence HVdrift_250V_3p9VPM_prebias_5_4_dur_38min_flashDCRC_1_4.msl
  • Noise for the 250V data is 66 eVee (7.5 nA). The uncalibrated noise follows the trend but the calibrated noise is higher than the 200V or 300V cases. Maybe I'm not identifying the lines consistently.
  • This would be easier if the lines were stronger. Why are they so weak? Lots of background…
  • In the last run we got decent lines in a few series after building the shield. Let's do that.
1647 MB = 67.0 %
1700 Start building lead/poly shield.
Put West and East walls in place
Put 4 sheets of lead (10“ x 26”) on North platform base
Put 8 layers of poly on North wall
attach North wall frame.
will wait till later to put North lead on.
1720 Fill LN2 cold trap bath
From Run 69 I estimate that with 2 lead walls in place, the bias drift rate should be 2.8 V/min. Let's say 2.76 V/min = 0.046 V/s. 
[fritts@jiajin /home/hep/cdmssoft/scdmsDAQ/MidasDAQ/online/scripts/pysequencer]: python HVscan.py -iDCRC 2 -HVs 200 -HVcalFile HV_calibrations/HV_DCRC2_control_cals_440V_190603.txt -HVdriftRate 0.046 -HVpreBias 10/2 -tSeries 72 -DCRCs2Flash 1,4 > ../../sequencer/HVdrift_200V_2p76VPM_prebias_10_2_dur_72min_flashDCRC_1_4.msl
1752 Start a 72 min series at HV = 200→400V, rate +2.76V/min with 10% prebias for 2 minutes, flash at end with 30 min wait.
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (420/400/440)/(420/400/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR and 1000 EOR randoms, trigger on DCRC1pB/C/D threshold = 6/6/6.
Use sequence HVdrift_200V_2p76VPM_prebias_10_2_dur_72min_flashDCRC_1_4.msl
2107 Start a 72 min series at HV = 200→400V, rate +2.76V/min with 10% prebias for 2 minutes, flash at end with 30 min wait.
CDMS detector: Driver Gains = 1x, DCRC4/1 QET biases = (420/400/440)/(420/400/450) uA, Front-End Gains = (2/2/3)/(5/5/5)
1000 BOR and 1000 EOR randoms, trigger on DCRC1pB/C/D threshold = 6/6/6.
Use sequence HVdrift_200V_2p76VPM_prebias_10_2_dur_72min_flashDCRC_1_4.msl
  • in the above series the gain seems to be increasing a little over time. Drift should be about 0.11 V/min slower.

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