| | Setup: DIB1/3/4 → SL 27/19/20 → 3.2 MHz filters → cables 2,1,3 → HV board inputs 1,3,2 → HV board outputs 1,2 → DCRC55(1)/50(3). DCRC4 → HV power supply. PuBe source present. |
| 0900 | Tower/MC/Coldplate = 21.6/25.2/147 mK, Still = 1.1 K / 0.100 mbar, G1/G2 = 241/220 mbar, 1K Pot = 1.62 K / 26 mbar, MB = 67.7% |
| 0910 | Fill LN2 cold trap bath. |
| 0922 | Unplugging the NaI signal from DCRC4 restores proper voltage control behavior. That's troubling. |
| 1009 | Determine that the problem occurs when dcrc4 analog ground is connected to true building ground. This is because the voltage dcrc4 provides to the power supply is between QI and dcrc analog ground, but it floating relative to building ground. Connecting the dcrc4 phonon adc cables connects analog ground to true ground, sinking the voltage signal. |
| 1020 | Disconnect NaI signal cable from DCRC4. Adjust driver offsets. |
| 1027 | Start sequence of HV scan 60-minute background data series by running sequence HVscan-0_30_65_70_75V-15_5PreBias-30Flash-30wait-1hrData.msl HV = 0, 30, 65, 70, 75 V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pD(Side1 PF) threshold 14. |
| 1052 | DCRC3PB is railed low, decrease driver offset by 0.3 |
| 1339 | Crap, realize that the HV is unplugged from the HV box! I forgot to re-attach it after investigating the dcrc4 biasing issue this morning. So the 2 series taken (07171214_1027 and 07171214_1205) are both at 0V. Stop the sequence Turn bias down to 0 and re-attach HV cable to HV board. |
| 1342 | Stopped the sequence after a flash and just as it was beginning to bias. Should be able to restart it now and be well neutralized. |
| 1344 | Make a slightly modified version of the sequence to just start at 30V, call it HVscan-30_65_70_75V-15_5PreBias-30Flash-30wait-1hrData.msl |
| 1345 | Start sequence of HV scan 60-minute background data series by running sequence HVscan-30_65_70_75V-15_5PreBias-30Flash-30wait-1hrData.msl HV = 30, 65, 70, 75 V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 1000 initial randoms, trigger on DCRC3pD(Side1 PF) threshold 14. |
| 1544 | At beginning of 65 V series (07171214_1535), DCRC3 PB,PC are railed low. Adjust their driver offsets down by 0.3 |
| 1549 | They're still low, adjust DCRC3 PB,PC driver offsets down by 0.3. DCRC control UI is being very sluggish. |
| 1654 | Fill LN2 cold trap. |
| 1722 | DCRC3pD is a little high now and ADC saturating. Increase it's driver offset by 0.05 |
| 1903 | DCRC3pD is a little low now. Decrease it's driver offset by 0.1 |
| 1907 | DCRC3pD is still a little low now. Decrease it's driver offset by a further 0.2 |
| 2043 | Start random rate scan sequence rand_rate_scan.msl to take 3 minutes of randoms at 60,80,100,120,140,160,180 Hz with ChargeWaveFormLengths/PhononWaveFormLengths = 64/4096 (half the current standards) on DCRCs 1,3,4 |
| | The DCRC3pD trigger was still enabled for this sequence. That was not intended. We'll redo it tomorrow. |
| 2140 | Looks like HV is now at 0V. Dial HV up to 70 V with 15% 5-minute prebias, using changeHV_0_70_preBias15_5.msl |
| 2210 | hmm, the HV still seems to be about 0, I guess because it's off (DCRC4qO is 0V). Change DCRC4qI to 10.76 and qO to 2, to turn it back on at 0V. Hopefully I'm doing this right. |
| 2220 | Dial HV up to 70 V with 15% 5-minute prebias, using changeHV_0_70_preBias15_5.msl |
| 2230 | HV = 69.94 V, V_leak = 2.87 mV |
| | Gonna test whether the pileup cut affects the event loss rate |
| 2236 | Start sequence of 6 60-minute background data series at HV = 70V, Driver Gains = 2x, QET biases = 480/360/440/480/380/490 uA, Front-End Gains = 10/5 on DCRC1/3, 2000 initial randoms, trigger on DCRC3pD (Side1pF) threshold = 14. The first 3 have 0 pileup rejection; the last 3 have the standard 0.00015 s pileup rejection. Using sequence pileuptest.msl |
| 2243 | Decrease DCRC3pB D.O. from -0.8 to -1.0. It wasn't railed but it was lower than usual. |
| 2246 | Increase DCRC3pC D.O. from -1.4 to -1.2. Baseline was too high. |
| | Channels remained unrailed throughout sequence, that's always nice. |