2017/06/10 (Saturday)
| Setup: DIB1/3/4 → 3.2 MHz filters 3/1/2 → cable 3/1/2 →gender changer 3/1/2 → HVConn 1/3/2 → HV 1/2 → DCRC55(1)/DCRC33(2) | |
| PuBe source in paraffin barrel behind shield (west side) | |
| 0124 | all DIB 2 channels railed in most recent data they railed around 2113 on 6/9, so most of the data just taken is junk |
| 0129 | Tower = 33.5 mK, Main bath = 43.8% Lab = 24.5 C, 37% humidity HV = 73 V, Vtest = 68.72 mV → 45.48V. Leakage is worse than ever. |
| 0130 | begin 900s bake |
| 0213 | pre-bias to HV = 75 V, wait for settle |
| 0230 | trying to get to pre-bias at 65V, leakage is huge and preventing it already HV = 95.2, Vtest=80.4 → Vdetector = 63V |
| 0242 | HV = 95.2, Vtest = 75.28 mV → Vdetector = 65.06V |
| 0243 | HV = 75V as starting point to reach Vdetector = 50V |
| 0307 | HV = 70.5, Vtest = 51.16 mV → Vdetector = 50.03 V |
| 0308 | Start 5 1-hour data series of 1-sided 50V HV coincidence data with Frontend Gain = (15/10/10)/(4/4/4), OG = 4/2, QET biases = 30 column from table from May 24, with 1000 beginning randoms, no flashing, and a 500ADC bin threshold trigger on DCRC4 pA (external trigger). Running OR trigger of NaI detectors with PuBe source on west side of shield. NaI detector C has 311 mV threshold and detector B has 288 mV threshold |
| 0309 | Tower = 33.18 mK |
| 0312 | Vtest = 50.69 mV |
| 1130 | HV = 70.5, Vtest = 61.04 mV → Vdetector = 45.99 V |
| 1133 | Tower/MC/Coldplate = 33.1/30.8/196 mK, Still = 1.3 K / 0.110 mbar, G1/G2 = 227/230 mbar, 1K Pot = 1.665 K / 20.0 mbar. Main bath = 28.9%. Predicted level: 31.7% |
| 1135 | Fill LN2 cold trap full. |
| 1139 | Dial HV down to 0 V and short leads |
| 1143 | Begin 30 minute bake with DCRCs 1&2 |
| 1145 | Lab = 23.0 C, 41% humidity |
| 1150 | Start LHe transfer (MB = 28.7%) |
| 1230 | Pre-bias to HV = 90.0 V, wait to settle (aiming for 65V pre-bias). Tower = 42.1 mK and cooling, all channels looking ok. |
| 1241 | HV = 90.0, Vtest = 81.5 mV → Vdetector = 57.29 V. |
| 1246 | HV = 102.4, Vtest = 91.2 mV → Vdetector = 65.79 V. |
| 1250 | Tower = 34.4 mK |
| 1253 | End LHe transfer (MB = 92.6%) |
| 1300 | Dial HV down to 77.8 V, targeting Vdetector = 50.0 V. Start recording Vtest with camera, wait to settle. |
| 1303 | HV = 77.8, Vtest = 70.5 mV → Vdetector = 49.5 V. |
| 1305 | HV = 78.5, Vtest = 72.4 mV → Vdetector = 49.4 V. |
| 1312 | HV = 81.9, Vtest = 80.5 mV → Vdetector = 49.58 V. |
| 1313 | Tower = 33.2 mK. |
| 1319 | Start 5 1-hour data series of 1-sided 50V HV coincidence data with Frontend Gain = (15/10/10)/(4/4/4), OG = 4/2, QET biases = 30 column from table from May 24, with 1000 beginning randoms, no flashing, and a 500ADC bin threshold trigger on DCRC4 pA (external trigger). Running OR trigger of NaI detectors with PuBe source on west side of shield. NaI detector C has 311 mV threshold and detector B has 288 mV threshold |
| 1319 | HV = 81.9, Vtest = 81.3 mV → Vdetector = 49.26 V. |
| 1400 | Notice that DCRC2 pC and pD both railed low. It looks like they started quite low in the digitizer range and got lower. They railed during Dump 36 of the _1318 series, between event 100 and 200. Trying to run Opera at home through x-forwarding is very sluggish, will try to adjust these channels as soon as possible… |
| 1437 | Adjust DCRC2pC driver offset up from 0.046 to 0.076 |
| 1444 | Adjust DCRC2pD driver offset up from -0.066 to -0.016 |
| As of Series _1419 Dump 26 all channels are OK, nothing railed. I really should have tried to unrail these channels before the _1419 series began, as it is the noise processing will probably fail for the railed channels. But couldn't manage it, too slow from home. | |
| 1753 | HV = 81.9, Vtest = 106.28 mV → Vdetector = 39.24 V… frustrating >:( |
| 1755 | HV = 104.3, Vtest = 138.7 mV → Vdetector = 48.63 V |
| 1805 | HV = 104.3, Vtest = 138.3 mV → Vdetector = 48.79 V |
| 1811 | Tower = 32.9 mK, Main bath = 88.6% Lab = 23.7 C, 40% humidity |
| 1832 | HV = 104.3, Vtest = 141.5 mV → Vdetector = 47.50 V |
| 1836 | Dial HV down to 0 V and short leads |
| 1839 | Begin 900s bake with DCRCs 1&2 |
| 1841 | Now recording Vtest and lab temperature/humidity with camera. |
| 1900 | Lab = 23.1 C, 41% humidity |
| 1910 | Pre-bias to HV = 114.8 V, wait to settle (aiming for 65V pre-bias(!)). Tower = 46.6 mK and cooling, all channels looking ok after relocking railed DCRC2pC. |
| 1924 | HV = 125.3, Vtest = 157.2 mV → Vdetector = 62.19 V |
| 1925 | Dial HV down to 101.7 V, targeting Vdetector = 50.0 V, wait to settle. |
| 1927 | HV = 101.7, Vtest = 122.99 mV → Vdetector = 52.34 V |
| 1937 | HV = 96.3, Vtest = 113.9 mV → Vdetector = 50.62 V |
| 1940 | HV = 95.1, Vtest = 111.7 mV → Vdetector = 50.24 V |
| 1940 | Tower = 33.8 mK |
| 1942 | HV = 95.1, Vtest = 110.3 mV → Vdetector = 50.82 V |
| 1945 | Start 5 1-hour data series of 1-sided 50V HV coincidence data with Frontend Gain = (15/10/10)/(4/4/4), OG = 4/2, QET biases = 30 column from table from May 24, with 1000 beginning randoms, no flashing, and a 500ADC bin threshold trigger on DCRC4 pA (external trigger). Running OR trigger of NaI detectors with PuBe source on west side of shield. NaI detector C has 311 mV threshold and detector B has 288 mV threshold |
| 1951 | HV = 95.1, Vtest = 107.1 mV → Vdetector = 52.11 V |
| 1955 | HV = 91.0, Vtest = 101.7 mV → Vdetector = 50.18 V. All channels looking ok in first two dumps. |
| 1955 | Fill LN2 cold trap full. |
| 2000 | Lab = 23.0 C, 41% humidity |
| 2350 | Lab = 22.9 C, 41% humidity |
