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| | Setup: DIB1/3/4 → 3.2 MHz filters 3/1/2 → cable 3/1/2 →gender changer 3/1/2 → HVConn 1/3/2 → HV 1/2 → DCRC55/DCRC33 |
| 0910 | Tower/MC/Coldplate = 33.2/30.7/196 mK, Still = 1.4 K / 0.110 mbar, G1/G2 = 253/212 mbar, 1K Pot = 1.689 K / 30 mbar, Main bath = 69.9%. Boil off rate: close to slow mode (predicted level: 71.8%). |
| 0915 | Fill LN2 cold trap bath |
| 0946 | Flash for 30s |
| 0949 | DCRC1 PA railed, change driver offset from 0.1 to 0.25. DCRC2 PC railed, change DO from -0.15 to 0.3. |
| 1027 | Tower temp = 33.3 mK. DCRC1 PA railed, change driver offset back to 0.1. DCRC2 PC railed, change DO from 0.3 to 0.35. |
| Crystal = 0 V |
| Channel | Baseline (V) |
| DIB1 PA | -0.2632 |
| DIB1 PB | -0.585 |
| DIB1 PC | -0.4581 |
| DIB2 PC | -0.5332 |
| DIB2 PD | -0.7126 |
| 1032 | Set HV bias to 60 V |
| 1040 | DCRC2 PC railed, change DO from 0.35 to 0.6 |
| 1041 | V_bias = 60 V, V_leak = 4.7 mV, C_crystal = 57.9 V |
| 1042 | Start 30 min 60V HV long trace random data set with 26.2144ms trace length, 20Hz in-run randoms with no starting/ending randoms. Observe baseline while data is taking. |
| Crystal = 57.9 V |
| Channel | Baseline (V) |
| DIB1 PA | -0.2399 |
| DIB1 PB | -0.60 |
| DIB1 PC | -0.4584 |
| DIB2 PC | -0.3398 |
| DIB2 PD | -0.7067 |
| 1134 | V_bias = 60 V, V_leak = 2.4 mV, V_crystal = 58.9 V |
| 1135 | Ground and flash detector |
| 1218 | Tower temp = 33.4 mK |
| 1221 | Set HV to 90 V |
| 1228 | DCRC2 PC railed, change DO from 0.6 to 0.8 |
| 1231 | V_bias = 90 V, V_leak =7.8 mV, V_crystal = 86.6 V |
| 1032 | Start 30 min 90V HV long trace random data set with 26.2144ms trace length, 20Hz in-run randoms with no starting/ending randoms. Observe baseline while data is taking. |
| Crystal = 86.6 V |
| Channel | Baseline (V) |
| DIB1 PA | -0.2558 |
| DIB1 PB | -0.6112 |
| DIB1 PC | -0.4538 |
| DIB2 PC | -0.8576 |
| DIB2 PD | -0.6788 |
| 1326 | V_bias = 90 V, V_leak =7.2 mV, V_crystal = 86.8 V |
| 1327 | Ground and flash detector |
| 1600 | Finish IbIs on DCRC1pA/DIB1pA/Side1pE, get prefactor |
| 1700 | Finish IbIs on DCRC1pB/DIB1pB/Side1pB, get prefactor |
it looks like we've been running close to the top of the DIB1pB transition, lowish on the DIB1pA transition.
| channel | QET bias | prefactor | QETbias*prefactor |
| DIB1pA/Side1pE | 127 | 0.2129 | 27.04 |
| DIB1pB/Side1pB | 150 | 0.3514 | 52.71 |
The above roughly agrees with observation from data that pE pulses are taller (maybe 2x) than pB pulses. Let's choose new QET biases to try to adjust these two to be more equal.
| channel | QET bias | prefactor | QETbias*prefactor | Selected QETbias*prefactor | New QET bias |
| DIB1pA/Side1pE | 127 | 0.2129 | 27.04 | 40 | 130.2 |
| DIB1pB/Side1pB | 150 | 0.3514 | 52.71 | 40 | 143.4 |
| 1721 | Reset DCRC 1, 2 trace lengths to 3.2768 ms by changing ODB settings to ChargeWaveFormLength = 16384, PhononWaveFormLength = 8192 |
| 1739 | Start sequence of 15, 1-hour data series of 1-sided 0V HV data with Frontend Gain = (20/20/20)/(-/4/3), OG = 4/2, with 1000 beginning randoms, no flashing, and a 35ADC bin threshold trigger on DCRC1 pA |
| 1751 | Fill LN2 cold trap |
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