| | DCRC1 and DCRC3 powered on and connected through HV setup EBoxDIB 2/3 → 3.2 MHz filters → Cables → remapping board I/remapping board II → HVside2board “DIB1”/“DIB2” → DCRC55(1)/50(3). Remapping boards have all possible lines switched off. . |
| | Baking using the UV LEDs for 12 hours last night. Tower temp held at 400 mK until 08:38, then fell to base in about 40 minutes |
| 0920 | Tower/MC/Coldplate = 82/56/??(3.1 kΩ) mK, Still = 1.12 K / 95 μbar, G1/G2 = 210/180 mbar, 1K Pot = 1.57 K / 6.0 mbar. MB = 73.9%
1K Pot has been stable.
Boiloff rate is good. Yesterday pressure was released at 52 minutes after 91.2% fill. It was released a few times later than that as well. |
| 0925 | Fill LN2 cold trap bath. |
| 0949 | With 33kΩ resistor on DIB1 QOFB line, manually start series of 20 minutes data with 60V HV/ -10V DIB1 with 1000 starting/1000 ending randoms with 1000 ADC Bin trigger threshold with ChargeTriggerBaselineLength=300, ChargeTriggerSampleLength=10 on DIB1 Qo. No Co-57 source present. |
| 1051 | Cease data taking. UV flash for 30 seconds, 10 minute cooldown. |
| 1020 | Move the 1 Ci PuBe source into the lab. It is in its paraffin-filled transport barrel on a stool behind the fridge on the west wall (by the LN2 cold traps). One of the movable shield walls has been moved into the west position between the PuBe source and the fridge. |
| 1052 | Switch DCRCs 55 and 50 Setup: EBoxDIB 2/3 → 3.2 MHz filters → Cables → remapping board I/remapping board II → HVside2board “DIB1”/“DIB2” → DCRC50(3)/55(1). Remapping boards have all possible lines switched off. |
| 1129 | Tests on DCRC50 triggering showed that this board triggers on Qo noise with Vpp around 0.09, even when trigger threshold is set as high as 30000 ADC Bin (~3V). Furthermore, it triggers on Qi when the threshold is set around 1000 ADC Bin, even though Qi is flatlined. Telnet indicates that the correct thresholds are being sent to the board. It is also odd that trigger thresholds at low 1 ADC Bin was not sufficient to trigger on the PA and PB noise produced by reading out LEDs. Power cycle both boards to check this again. |
| 1143 | Cease trigger testing after finding a good threshold at 3333 ADC Bin. Seems off since that corresponds to 400 mV, yet we are still trigger on 100 Vpp pulses/noise and lower. UV flash for 30 seconds, 10 minute cooldown. |
| 1157 | Bring out Co-57 source and put in castle, source is 15“ from cryostat. Cryostat has 20.5” diameter so source is about 25“ from detector center. |
| 1200 | With 33kΩ resistor on DIB1 QOFB line, manually start series of 48 minutes data with 60V HV/ -10V DIB1 with 1000 starting/1000 ending / 1 hz randoms with 3333 ADC Bin trigger threshold with on DIB1 Qo. Co-57 source 15” from cryostat. Cryostat has 20.5“ diameter so source is about 25” from detector center. |
| 1248 | Cease data taking. Use SQUIDGUI to ensure that we are still triggering OK, and it seems fine. UV flash for 30 seconds, 10 minute cooldown. |
| 1325 | With 33kΩ resistor on DIB1 QOFB line, manually start series of 40 minutes data with 80V HV/ -10V DIB1 with 1000 starting/1000 ending / 1 hz randoms with 3333 ADC Bin trigger threshold with on DIB1 Qo. No Co-57 source present. Leakage current at 17 mV. |
| 1409 | Cease data taking. Looking at traces in BatViewer and SQUID GUI, we are now triggering on noise with Vpp~0.1V. |
| 1426 | UV flash for 30 seconds, 10 minute cooldown. |
| 1427 | We still seem to be having triggering issues. Although the noise level is the same as in past good runs(~0.1Vpp) we are unable to find a trigger level which is not dominated either by noise or by good-sized pulses. Either our signal from the detector has just fallen off, or something has changed in the DCRCs. |
| 1425 | Change DIB1 (now DCRC50) gender changer. |
| 1525 | Using DCRC50 as DIB2 and DCRC33 as DIB1 appeared to show some noise improvement, but triggering was an issue. Setting a trigger threshold on DCRC33 of 1 ADC Bin gave the same results as a threshold of 150 ADC: both showed very slow trigger rates and triggered on noise and pulses alike. However, we are now hopeful that switching so that DCRC50 is on DIB1 and DCRC33 is on DIB2 will help. |
| 1555 | Still having issues with triggering and noise. Commence 10 minute UV LED bake. |
| 1620 | Possibly resolve noise issue by changing ChargeTriggerSampleRate from its original value of 5 to 4. Switch back to DIB1=DCRC50 DIB2=DCRC55 and UV flash for 30 sec with 10 minute cooldown. |
| 1637 | Take out Co-57 source from safe. Place in castle 2m away from detector. |
| 1640 | With 33kΩ resistor on DIB1 QOFB line, manually start series of 20 minutes data with 20V HV/ -10V DIB1 with 1000 starting/1000 ending randoms with 220 ADC Bin trigger threshold with on DIB1 Qo. Co-57 2m from tower. |