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2015/07/17 (Friday)

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Current configuration: DIB1/2/3 → 100MHz filter/none/none → DCRC55/33/50. No bake, no source.
0900 Tower at 32.5 mK overnight, somewhat elevated, plus occasional excursions on the order of +1 mK. Looks a bit like a Bad State. Most phonon channels railed. After unrailing all channels, temperature falls back to base.
0913 Fill LN2 cold trap Dewar
0935 MC/Tower/Coldplate = 25.3/31.0/145 mK, Still = 0 mW / 0.11 mbar / 1.10 K, G1/G2 = 205/200 mbar, 1K Pot = 1.67 K / 13 mbar, Main bath = 67.0%

The plan: measure IbIs on DIB3→DCRC50 with the 100MHz filter. This will allow a comparison with the no-filter and 3.2MHz filter cases.

0945 Retake IbIs on DIB3→nofilter→DCRC50 pA (since the first time it looked anomalous). Settings for Output Gain / Frontend Gain / Driver Offset = 1 / 1 / 0.
1004 Return DIB3pA settings to standard values
1035 Look at pulse shapes on DIB3 to see if they are improved after we put the 100MHz filter on.
DIB3→nofilter→DCRC50, other DCRCs running normally
DIB3→nofilter→DCRC50, other DCRCs' SQUIDs grounded

Basic observation: pA mediocre, pB decent, pC and pD poor on DIB3→nofilter→DCRC50, and turning off other DCRC pulses doesn't help.

1055 Remove 100MHz filter from DIB1→DCRC55 and put it on DIB3→DCRC50. Power up boards, zap SQUIDs. Had to increase QET bias on DIB3pC&pD to see pulses.
1145 Take IbIs data on DIB3→100MHz→DCRC50. Analysis shows that the effect is similar to the 3.2MHz filter though slightly less strong. QET biases calculated for the 3.2MHz filter should work for the 100MHz filter too.
1453 Look at DIB3→DCRC50 pulse shapes, now with 100MHz filter
DIB3→100MHzfilter→DCRC50, other DCRCs running normally
DIB3→100MHzfilter→DCRC50, other DCRCs' SQUIDs grounded

Basic observation: DIB3→DCRC50 pulses definitely improved by adding 100MHz filter. Having other DCRCs' phonons on may degrade DIB3 pulses a little.

1532 Mini-bake: flash until temperature plateaus, then stop.
1612 Apply -4/+4 V. Set DIB3 QET biases as in the no-filter case except DIB3pC/pD = 70,109 μA.
1613 Start bkg data run.
1631 Stop data, 0/0 V. Flash 30 seconds.
1650 Adjust QET biases of DIB3pC/pD to 80,106 μA, the 3.2MHz values. (I'd intended pA and pB to be reset, too - MF)
1651 Noise that looked characteristic of lack of timing link present - wr 3c 0 fixed it for some reason.
1654 Apply -4/+4 V. Start bkg data run.
1711 Stop data.
1729 Fill LN2 trap full.

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