2015/06/09 (Tuesday)

Studying the leak on the transfer tube:

• Very strong leak seen squirting He through the needle into the valve, between the black grip and the red part at the end. Only seen when valve is open.
• Leak checker can pump tube jacket down to 4e-3 mbar with bkg leak of 2.5 pbar*l/s
• Cleaned the vacuum grease off the tube from yesterday, where the cryostat-end meets the bellows
• With grease cleaned off, a short burst from the needle produced a 2X or 3X increase in the leak signal
• Glopping the joint with grease again seems to get rid of the leak
• Covered the end with duct tape to hold the grease in as a temporary fix.
• Tried pumping out jacket then isolating it to see how well it held vacuum. With tube valve open or closed, it rises to around 1.5e-2 mbar in 10 minutes.

Used IbIs curves (tower at 34 mK, DIB1/2/3 → DCRC31/33/50) to calculate optimal QET biases (where R=Rnormal/4):

Establish timing link between boards and find that new configuration appears to have reduced pulse noise in DIB3 (now DCRC 31). However it is noted that an odd prepulse spike now appears on many of the pulses (see Figure 1 below). This spike was also seen in a study by M. Pyle et al. at Stanford. Despite this, pulses look cleaner overall on phonon channel B (first channel we studied). We easily applied the gains and trigger thresholds noted in Table 2 below (only triggering on the phonon channel of interest), and were able to see pulses such as the typical pulse shown in Figure 2. We could have increased the front end gain beyond 5, but we decided to move on and check the other channels.

Figure 1: Prepulse Spike on Phonon Channel B

Figure 2: DCRC 31 DIB 3: Phonon Channel B
FrontEnd Gain of 5, Output Gain of 4, Driver Offset of -0.008, and Trigger Threshold of 50

Moving to phonon channel A, we found that we needed a higher trigger threshold, which we set to 250 ADC Bins. We also found that we had to continually adjust the driver offset as we increased the output gain in order to continuing triggering. As Table 2 shows, the driver offset is much higher for phonon channels A, C and D than for channel B. We also developed a routine for increasing the gain without railing/losing the pulses:

1. Increase the front end gain by 1, and then alter the driver offset until a pulse is visible and triggering.
2. Increase the front end gain again, until it reached the desired value, adjusting the driver offset after each increase. Adjust the trigger threshold as need be.
3. Increase the output gain in incremental values as you did with the front end gain. As before after each increase adjust the driver offset until triggering occurs.
4. Once both gains are at the correct values, fix the Y-axis such that you can see the pulses (or at least a portion of them) and the Y-axis zero. Adjust the driver offset until the prepulse aligns with the zero.

It was more difficult to increase the frontend and output gains and we did not attempt to increase them beyond 5 and 4, respectively.

Figure 3: DCRC 31 DIB 3: Phonon Channel A
FrontEnd Gain of 5, Output Gain of 4, Driver Offset of -0.048, and Trigger Threshold of 250

When we switched to phonon channel C, we found the odd behavior shown in Figure 4 below. However, this behavior went away once we increase the front end gain beyond 1.

Figure 4: DCRC 31 DIB 3: Phonon Channel C Odd Behavior
FrontEnd Gain of 1, Output Gain of 1, Driver Offset of 0.0, and Trigger Threshold of 50

Phonon channel C had the largest driver offset (-0.656), but the pulses still look decent (Figure 5). As with channel A, it was difficult to increase the gains, and we did not attempt to increase them beyond 5 for front end and 4 for output.

Figure 5: DCRC 31 DIB 3: Phonon Channel C
FrontEnd Gain of 1, Output Gain of 1, Driver Offset of -0.656, and Trigger Threshold of 250

Phonon channel D was the worst of the DIB3 phonon channels with this configuration, although some pulses still looks decent (as good as the pulses seen on the other channel). In Figure 6 below we included a “good” and “bad” pulse for comparison.

Figure 6: DCRC 31 DIB 3: Phonon Channel D
Typical “good” pulse	Typical “bad” pulse“
FrontEnd Gain of 5, Output Gain of 4, Driver Offset of -0.502, and Trigger Threshold of 250

The settings in Table 2 above, and the QET biases from Table 1, were saved into the settings file I:\data\run053\dcrc31_dib3_0V_test.xml