2013/03/23
| 1130 | Fed Cricket 4 pellets. |
|---|---|
| 1142 | Attempted to connect DCRC32 to Dib1 and DCRC33 to Dib2, again signal from Dib2 but not Dib1. |
| 1146 | Filled LN2 cold trap full. |
| 1155 | Since the fridge temp has dropped to 60mK and G1 and G2 have risen to ~74mbar, we have decided to switch to circulate on cold trap 2. Open V13B, allow mixture to settle and then open 12B. With both cold traps open G1:66.1mbar, G2: 57.3mbar, P1:0.085. Close V13A. |
| 1215 | Close c.t. 1 speedivalve and 12A. Open 11A and 8. P1 peaked at ~30mbar. |
| 1230 | Attempted to connect DCRC32 to Dib 2, but found no signal. It seems the issue is with board, though an electrical check on Dib1 will confirm this. |
| 1315 | IGH has settled. Currently G1: 74.8mbar, G2: 68.0mbar, P1: 0.24mbar (better that the last time we did this (0.65mbar) but not as good as the first time (0.15mbar)), 1K Pot: 1.736K, Fridge: 60.11mK. |
| 1322 | Closed V11A and V8. Note that there could still be some mixture in cold trap 1 but it is too difficult to determine by using P1. |
| 1403 | Performed electrical check. Results below. Overall few small changes but mostly consistent with similar check done on 2013/03/11. This suggests that the issue lies in the board. Jianjie also performed tests which suggested that the board wasn't functioning properly. In particular it seems that the charge channel amplifiers aren't turning on. |
| Detector: | G101b DIB1 | BH: | Stripline: | 21 | |
| SC: | ZB1-1-6 | 60 mK | |||
|---|---|---|---|---|---|
| Face: | 2 | Date | 2012-03-23 | ||
| SQUET: | ZC70 | Who | AK | ||
| Signal | Pos. lead | Gnd lead | Nominal | Actual | Chassis |
| (Gnd lead) | |||||
| Nominal: | |||||
| < 0.1 nS | |||||
| Phonon | |||||
| SQUID bias A/Ret | 4 | 20 | 80 - 140 | open | OK |
| SQUID bias B/Ret | 19 | 34 | 80 - 140 | open | OK |
| SQUID bias C/Ret | 8 | 24 | 80 - 140 | 99 | OK |
| SQUID bias D/Ret | 23 | 39 | 80 - 140 | open | OK |
| Feedback A/Ret | 37 | 21 | 1.0 - 1.3 k | 1.5k | OK |
| Feedback B/Ret | 2 | 18 | 1.0 - 1.3 k | open | OK |
| Feedback C/Ret | 41 | 25 | 1.0 - 1.3 k | open | OK |
| Feedback D/Ret | 22 | 6 | 1.0 - 1.3 k | 1.2k | OK |
| QET A/Ret | 3 | 1, 13, 14, 17, 32 | 20 - 30 | open | OK |
| QET B/Ret | 35 | 29, 33, 47, 48 | 20 - 30 | 27,26,31,27 | OK |
| QET C/Ret | 7 | 5, 9, 10, 28 | 20 - 30 | open,26,18,26 | OK |
| QET D/Ret | 38 | 36, 40, 43, 44 | 20 - 30 | open | OK |
| QET C/QET A Ret | 7 | 1, 13, 14, 17, 32 | open,33,28,31,29 | ||
| QET C/QET D Ret | 7 | 36, 40, 43, 44 | open,open,26,26 | ||
| Charge | |||||
| FET heater +/- | 45 | 46 | 1.0 - 1.1 k | 1.23k | OK |
| Qi bias/QET Ret | 15 | <1 nS | OK | OK | |
| Qo bias/QET Ret | 11 | <1 nS | OK | OK | |
| Qi feedback/Drain/Source | 50 | 16, 31 | <1 nS | 18,18 | OK |
| Qo feedback/Drain/Source | 30 | 12, 27 | <1 nS | 19,19 | OK |
| Qi drain | 16 | chassis | <0.1 nS | – | OK |
| Qo drain | 12 | chassis | <0.1 nS | – | OK |
| Qi source | 31 | chassis | <0.1 nS | – | OK |
| Qo source | 27 | chassis | <0.1 nS | – | OK |
| FET Tsense +/FET heater- | 49 | 46 | — | OK | |
| LED 1 | 42 | chassis | — | – | |
| LED 2 | 26 | chassis | — | – | |
| Isolation Checks | |||||
| QET C/Feedback D | 18 | 17 | OK | ||
| QET C/SQUID bias D | 18 | 30 | OK | ||
| QET D/Feedback D | 29 | 17 | OK | ||
| QET D/SQUID bias D | 29 | 30 | OK | ||
| QET A Ret/QET B Ret | 1, 13, 14, 17, 32 | 29, 33, 47, 48 | OK | ||
| QET A Ret/Qi feedback | 1, 13, 14, 17, 32 | 38 | OK | ||
| QET A Ret/Qi drain | 1, 13, 14, 17, 32 | 25 | OK | ||
| QET D Ret/QET B Ret | 36, 40, 43, 44 | 29, 33, 47, 48 | OK | ||
| QET D Ret/Qi feedback | 36, 40, 43, 44 | 38 | OK | ||
| QET D Ret/Qi drain | 36, 40, 43, 44 | 25 | OK | ||
| 1606 | Attempted to reconnect DCRC33 to Stripline 19 (Dib2), we are now seeing the flatline we had seen before on DCRC32 to 21, plus a flatline on Phonon D. This board had been set aside after Jianjie had finished his tests. Since it had functioned correctly throughout these tests we can assume that something is wrong with the board's connection to the E box (and thus the striplines and detector) or there is something going wrong with the computer's connection to the board. Jianjie suggested that there might be some sort of capacitance in the stripline(s) that is affecting the boards. He suggested the tests described below. |
|---|---|
| 1653 | Test 1: Electrical Test on Dib 2- Results posted below. No significant changes were seen from the test performed on 2013/03/11. |
| Detector: | G101b DIB2 | ||||
| SC: | ZB1-1-9 | 60mK | |||
|---|---|---|---|---|---|
| Face: | 5 | Date | 2013-03-23 | ||
| SQUET: | ZC23 | Who | AC, SM | ||
| Signal | Pos. lead | Gnd lead | Nominal | Actual | Chassis |
| (Gnd lead) | |||||
| Nominal: | |||||
| < 0.1 nS | |||||
| Phonon | |||||
| SQUID bias A/Ret | 4 | 20 | 80 - 140 | 107 | OK |
| SQUID bias B/Ret | 19 | 34 | 80 - 140 | 97 | OK |
| SQUID bias C/Ret | 8 | 24 | 80 - 140 | 105 | OK |
| SQUID bias D/Ret | 23 | 39 | 80 - 140 | 95 | OK |
| Feedback A/Ret | 37 | 21 | 1.0 - 1.3 k | 1.3k | OK |
| Feedback B/Ret | 2 | 18 | 1.0 - 1.3 k | 1.3k | OK |
| Feedback C/Ret | 41 | 25 | 1.0 - 1.3 k | 1.3k | OK |
| Feedback D/Ret | 22 | 6 | 1.0 - 1.3 k | 1.3k | OK |
| QET A/Ret | 3 | 1, 13, 14, 17, 32 | 20 - 30 | 38,35,31,35,33 | OK |
| QET B/Ret | 35 | 29, 33, 47, 48 | 20 - 30 | 33,32,52,32 | OK |
| QET C/Ret | 7 | 5, 9, 10, 28 | 20 - 30 | 32,32,21,32 | OK |
| QET D/Ret | 38 | 36, 40, 43, 44 | 20 - 30 | 34,32,31,31 | OK |
| Charge | |||||
| FET heater +/- | 45 | 46 | 1.0 - 1.1 k | 1.27k | OK |
| Qi bias/QET Ret | 15 | <1 nS | OK | OK | |
| Qo bias/QET Ret | 11 | <1 nS | OK | OK | |
| Qi feedback/Drain/Source | 50 | 16, 31 | <1 nS | 18,18 | OK |
| Qo feedback/Drain/Source | 30 | 12, 27 | <1 nS | 19,19 | OK |
| Qi drain | 16 | chassis | <0.1 nS | – | OK |
| Qo drain | 12 | chassis | <0.1 nS | – | OK |
| Qi source | 31 | chassis | <0.1 nS | – | OK |
| Qo source | 27 | chassis | <0.1 nS | – | OK |
| FET Tsense +/FET heater- | 49 | 46 | — | OK | |
| LED 1 | 42 | chassis | — | – | |
| LED 2 | 26 | chassis | — | – | |
| 1706 | Test 2: Test Board DCRC32 without Connecting to E Box- After disconnecting the board from the E box and supplying power to the board we found that the -15V and +15V LEDs were off. These were the same LEDs that were off when DCRC32 was powered on, further suggesting that this board has the same issue as 32. |
|---|---|
| 1740 | To expand upon Test 2 above, Jianjie came down to help test DCRC33. Something went wrong during these tests and we had to restart the computer. Upon restarting we found that the -15V and +15V LED's were on for DCRC33. However they went off again after more tests. |
| 1840 | Jianjie determined that there is an issue with the negotiation between the power supply and the DCRC boards. Specifically, only 7V is supplied by the power source although the charge channel amplifiers need 15V, and thus they do not turn on. Jianjie was able to correctly power DCRC33 at times, but never DCRC32. We decided to warm up as we will not be able to take any data with the boards as they are. |
| 1900 | Begin pumping mixture to the dump. Close V13B, open V9, V5, V12A and the c. t. 1 speedivalve. Stop the 1K Pot by closing the black speedivalve, and closing V4A. Switch to exhaust. |
| 1910 | Turn on mixing chamber heater to 10mW. Current Fridge temp: 1.52K, current He level: 52.2%. Using the 2%/hour approximation, we predict that we will run out of He around 20:00 tomorrow. |
| 1942 | Filled LN2 cold trap full. |
| 1954 | Fed Cricket 4 pellets. |