UMN CDMS Wiki archive
start › cdms › k100 › run_diary › 20130311

2013/03/11

0035 Mixing chamber temperature 2.3 K. Surrender control of IVC to computer and start automated circulation procedure.
0040 Switch to RuO2 H35 thermometer.
Fill N2 cold trap full.
Fed Cricket 3 pellets.
0215 Mixing chamber temperature 65.4 mK and cooling slowly. Valve V6 on IGH has been open at 100% for at least an hour. Stop automated circulation procedure.
0250 Mixing chamber temperature 64.2 mK. Quick electrical check on DIB 1 reveals that both QET D Return lines are still intact. Start plugging in DCRCs.
0330 Plugged DCRC33 into DIB 1 and DCRC32 into DIB2, and made DCRC33 the master. Charge traces from DIB 2 look fine, although the oscillations in Qo are still present. However, charge traces flat-line in DCRC33. Both a soft and hard reset of DCRC33 does not alter this, neither does turning on the FET heater for a few minutes.
Interestingly, phonon channel A's trace on DIB 1 was very noisy to begin with, but all of a sudden settled down. Phonon channel B's trace on DIB 1 started off railed and kicked into action as soon as phonon channel A's trace settled down. At first it was noisy until the 15 V power supply was turned off but the FET heater was left on. Turning the power supply on again doesn't seem to repeat the trick.
0340 Qi on DIB 1 shows some very noisy negative pulses on occasion, only when they are large enough to dip significantly below the baseline. Adjusting the offset makes no difference.
0440 Give up - it's too late. Leave boards plugged in for now. Will go home and sleep for a couple of hours. Next steps are to take DCRC33 out and perform another electrical check with the breakout box. If it passes, try DCRC32. I don't think this is a DCRC problem, but this will at least rule out this possibility. It will also give me some time to think about why we see this behaviour.
0947 Filled LN2 cold trap.
1008 Removed DCRC33.
Mixing chamber temperature is at 60 mK. 1K pot is at 1.79 K. Is there a reason for why this wasn't lowered?
1015 Fed Cricket 4 pellets.
1032 Performed electrical check on Dib1 (including isolation checks). Everything seems in line with the electrical check done at 4.2 K.
1101 Plugged DCRC32 into Dib1. All the channels seem responsive. See image below.

1127 Plugged DCRC33 into Dib 2. All channels seem responsive. See image below.

1212 Plugged in DCRC33 and DCRC32 into Dib1 and 2, respectively. Unfortunately, the charge channels and Ph B and D are railing again on Dib 1.

1451 Plugged in DCRC32 and DCRC33 into Dib1 and 2, respectively.
The charge channels in Dib 2 railed. When resetting the power on board 33, the charge channels plus 2 phonon channels railed. I suspect there's an issue with DCRC33. I unplugged the power cord from the external PoE for board 33, waited a minute, and plugged it back in. All channels seem to be responding well now.
2222 Filled LN2 cold trap.
2239 Flash detector for 5 hours. Cool down for 2 hours. Take six 5-minute series with Dib 1/2 at +/-4 V, and then another six 5-minute series with Dib 1/2 at -/+ 4 V. Between each series there is 6 seconds of flashing, followed by 20 minutes of cool down.
2315 Begin LHe transfer (22.9%).
2350 End LHe transfer (90.9%).
Summary of today's efforts

Much of today was spent rearranging the three different DCRC boards in the two dib slots to find the best low noise configuration while maintaining all channel signals. It was found that neither DCRC33 or DCRC31 could be placed in Dib 1 without a channel appearing railed. Thus, DCRC32 is going to be kept in Dib 1. Tests were also done to see if DCRC31 or DCRC33 should be placed in Dib 2. A list of input/output voltage values were created for DCRC31. Unfortunately, when DCRC31 was tested, it was found that the charge pulses were saturating and the charge offset could not be varied. This left DCRC33 as the choice of board to put into Dib2. |