2012/02/04

1532	Filled LN2 cold trap. Dewars in gas tank room ran of out LN2, so we had to pull some LN2 from our clean room dewar. We'll have to do this for Sunday and Monday as well, probably.
1700	Temperature has been rising gradually since we started taking data last night. Temperature of 1 K pot a little low at just under 1.5 K. Open needle valve to raise its temperature closer to 1.6 K. Pressure in G1 about 10 mbar higher than that in G2: indicates that helium trap may have a blockage. Will need to clean trap tomorrow.
2200	Conducted bench tests on HV DCRC interface boards this afternoon. Borrowed power supply from Little Blue: it is capable of delivering up to 1 kV, so more than enough for our purposes. Boards seem to be behaving as expected: measure almost entire applied bias across 100 MΩ R38 resistor and 10 MΩ resistor on branch lines.
	Unplugged DCRC boards to facilitate the installation of interface boards. DCRC33 (DIB2 & master) was chosen for bias supplying board. Timing link established. Some strange results:

Traces from DCRC33 were practically non-existant (see below). Every now and then there a very sharp negative trace would appear in Qi & Qo.
Traces from DCRC32 were very noisy (see below). Every now and then one could see pulses in Qi & Qo.
Tower temperature started rising steadily as bias was applied. Not sure why. Seemed to possibly reach a plateau at just over 90 mK.
Potential between QET A return and Qi/Qo was 10% of applied bias. Resistance across crystal should be in GΩ region, so the phonon pins should be the points of highest potential. Maybe there is something I've forgotten to consider. Could try replacing R38 with 10 MΩ resistor, but shouldn't have to!
Could not flash LEDs on DCRC33 while interface boards were plugged in. LEDs on DCRC32 were fine. Could this have something to do with the fact that DCRC33 was the master board? Need to take a hard, long look at the circuit diagrams.

Figure 1: Traces from DCRC32; DIB1 & slave; not bias supplying board.

Figure 2: Traces from DCRC33; DIB2 & master; bias supplying board; bias 15 V.

	Swapped interface boards, but did not apply bias. With exception of point 4, all of the above was true. The problem may lie with the master board.
2220	Plug DCRCs back into ebox without interface boards. Start flashing detector.
2300	Fill N2 cold trap full.
2315	Stop flashing detector.
2355	Set up DAQ to take Ba-133 data with higher trigger threshold of 40 ADC bins at biases -2 V, -3 V, -5 V, -6 V. Four half-hour long data sets at each series.