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2012/01/24

1950 Start evacuating IVC. Seems to have held vacuum fairly well over last month: pressure in IVC was about 0.1 mbar.
2015 Fill N2 cold trap full.
2055 Conduct room temperature electrical check: everything looks fine.
Detector: G102 DIB1 BH: Stripline 19
SC: ZB1-4-8 300 K
Face: 2 Date 2012-01-24
SQUET: ZC23 Who HC
Signal Pos. lead Gnd lead Nominal Actual Chassis
(Gnd lead)
Nominal:
< 0.1 nS
Phonon
SQUID bias A/Ret 4 20 3 - 5 k 4.4 OK
SQUID bias B/Ret 19 34 5 OK
SQUID bias C/Ret 8 24 4.6 OK
SQUID bias D/Ret 23 39 4.3 OK
Feedback A/Ret 37 21 15 - 25 k 18 OK
Feedback B/Ret 2 18 20 OK
Feedback C/Ret 41 25 19 OK
Feedback D/Ret 22 6 18 OK
QET A/Ret 3 1, 13, 14, 17, 32 60 - 80 107,93,87,90,88 OK
QET B/Ret 35 29, 33, 47, 48 87,87,91,87 OK
QET C/Ret 7 5, 9, 10, 28 84,85,74,84 OK
QET D/Ret 38 36, 40, 43, 44 87,84,84,84 OK
Charge
FET heater +/- 45 46 1.0 - 1.1 k 1.068 OK
Qi bias/QET Ret 15 24 - 26 nS open, 39 MOhm (B) OK
Qo bias/QET Ret 11 open, 39 MOhm (B) OK
Qi feedback/Drain/Source 50 16, 31 15 - 17 nS 44 MOhm OK
Qo feedback/Drain/Source 30 12, 27 44 MOhm OK
Qi drain 16 chassis < 0.1 nS – OK
Qo drain 12 chassis – OK
Qi source 31 chassis – OK
Qo source 27 chassis – OK
FET Tsense +/FET heater- 49 46 0.6 - 0.7 V 0.726 OK
LED 1 42 chassis 1.0 - 1.1 V 1.139 –
LED 2 26 chassis 1.128 –
Detector: G102 DIB2 BH: Stripline 20
SC: ZB1-4-6 300 K
Face: 5 Date 2012-01-24
SQUET: ZC70 Who HC
Signal Pos. lead Gnd lead Nominal Actual Chassis
(Gnd lead)
Nominal:
< 0.1 nS
SQUID bias A/Ret 4 20 3 - 5 k 4.8 OK
SQUID bias B/Ret 19 34 4.4 OK
SQUID bias C/Ret 8 24 4.6 OK
SQUID bias D/Ret 23 39 5.2 OK
Feedback A/Ret 37 21 15 - 25 k 29 OK
Feedback B/Ret 2 18 25 OK
Feedback C/Ret 41 25 28 OK
Feedback D/Ret 22 6 35 OK
QET A/Ret 3 1, 13, 14, 17, 32 60 - 80 96,88,82,85,82 OK
QET B/Ret 35 29, 33, 47, 48 78,78,82,78 OK
QET C/Ret 7 5, 9, 10, 28 76,76,69,76 OK
QET D/Ret 38 36, 40, 43, 44 83,80,80,80 OK
FET heater +/- 45 46 1.0 - 1.1 k 1.061 OK
Qi bias/QET Ret 15 24 - 26 nS open, 40 MOhm (C&D) OK
Qo bias/QET Ret 11 open, 39 MOhm (C&D) OK
Qi feedback/Drain/Source 50 16, 31 15 - 17 nS 43 MOhm OK
Qo feedback/Drain/Source 30 12, 27 43 MOhm OK
Qi drain 16 chassis < 0.1 nS – OK
Qo drain 12 chassis – OK
Qi source 31 chassis – OK
Qo source 27 chassis – OK
FET Tsense +/FET heater- 49 46 0.6 - 0.7 V 0.71 OK
LED 1 42 chassis 1.0 - 1.1 V 1.137 –
LED 2 26 chassis 1.127 –
2115 Start cryocleaning mixture through cold trap 2. Mixture is rather dirty (dump pressure is 765 mbar). Will need to clean nitrogen cold traps tomorrow.

HV DCRC Interface Board

Figure 1: Circuit diagram (click on diagram for larger image).
Figure 2: Printed Circuit Board.